Datasheet > EPF10K100ABI356-2

EPF10K100ABI356-2

更新时间： 2023-02-26 14:53:49

品牌	Logo	应用领域
英特尔 - INTEL		/
页数	文件大小	规格书
143页	1990K
描述
Loadable PLD, 0.7ns, CMOS, PBGA356, BGA-356

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FLEX 10K Embedded Programmable Logic Device Family Data Sheet

Table 2. FLEX 10K Device Features

Feature

EPF10K70

EPF10K100

EPF10K130V

EPF10K250A

EPF10K100A

Typical gates (logic and

70,000

100,000

130,000

250,000

RAM) (1)

Maximum system gates

118,000

3,744

468

158,000

4,992

624

211,000

6,656

832

310,000

12,160

1,520

LEs

LABs

EABs

Total RAM bits

Maximum user I/O pins

18,432

358

24,576

406

32,768

470

40,960

470

Note to tables:

(1) The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 31,250 gates in addition to the listed typical or maximum

system gates.

–

Devices are fabricated on advanced processes and operate with

a 3.3-V or 5.0-V supply voltage (see Table 3

In-circuit reconfigurability (ICR) via external configuration

device, intelligent controller, or JTAG port

...and More

Features

ClockLock^TMand ClockBoost^TMoptions for reduced clock

delay/ skew and clock multiplication

–

Built-in low-skew clock distribution trees

100% functional testing of all devices; test vectors or scan chains

are not required

Table 3. Supply Voltages for FLEX 10K & FLEX 10KA Devices

5.0-V Devices

3.3-V Devices

EPF10K10

EPF10K20

EPF10K30

EPF10K40

EPF10K50

EPF10K70

EPF10K100

EPF10K10A

EPF10K30A

EPF10K50V

EPF10K100A

EPF10K130V

EPF10K250A

Altera Corporation

123 4 5 6 7...143

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