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EP4CE55F23C7 PDF预览

EP4CE55F23C7

更新时间: 2024-01-24 18:54:53
品牌 Logo 应用领域
英特尔 - INTEL
页数 文件大小 规格书
44页 663K
描述
Field Programmable Gate Array, 3491 CLBs, 472.5MHz, 55856-Cell, PBGA484, 23 X 23 MM, 1 MM PITCH, FBGA-484

EP4CE55F23C7 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:BGA
包装说明:23 X 23 MM, 1 MM PITCH, LEAD FREE, FBGA-484针数:484
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.21最大时钟频率:472.5 MHz
JESD-30 代码:S-PBGA-B484JESD-609代码:e1
长度:23 mm湿度敏感等级:3
可配置逻辑块数量:3491输入次数:327
逻辑单元数量:55856输出次数:327
端子数量:484最高工作温度:85 °C
最低工作温度:组织:3491 CLBS
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA484,22X22,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
电源:1.2,1.2/3.3,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:2.4 mm
子类别:Field Programmable Gate Arrays最大供电电压:1.25 V
最小供电电压:1.15 V标称供电电压:1.2 V
表面贴装:YES温度等级:OTHER
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40宽度:23 mm
Base Number Matches:1

EP4CE55F23C7 数据手册

 浏览型号EP4CE55F23C7的Datasheet PDF文件第5页浏览型号EP4CE55F23C7的Datasheet PDF文件第6页浏览型号EP4CE55F23C7的Datasheet PDF文件第7页浏览型号EP4CE55F23C7的Datasheet PDF文件第9页浏览型号EP4CE55F23C7的Datasheet PDF文件第10页浏览型号EP4CE55F23C7的Datasheet PDF文件第11页 
1–8  
Chapter 1: Cyclone IV Device Datasheet  
Operating Conditions  
Table 1–7. Bus Hold Parameter for Cyclone IV Devices (Part 2 of 2) (1)  
V
CCIO (V)  
Parameter  
Condition  
1.2  
1.5  
1.8  
2.5  
3.0  
3.3  
Unit  
Min Max Min  
Max Min Max Min Max Min Max Min Max  
Bus hold trip  
point  
0.3  
0.9 0.375 1.125 0.68 1.07 0.7  
1.7  
0.8  
2
0.8  
2
V
Note to Table 1–7:  
(1) Bus hold trip points are based on the calculated input voltages from the JEDEC standard.  
OCT Specifications  
Table 1–8 lists the variation of OCT without calibration across process, temperature,  
and voltage (PVT).  
Table 1–8. Series OCT Without Calibration Specifications for Cyclone IV Devices  
Resistance Tolerance  
Industrial, Extended  
industrial, and  
Automotive Maximum  
Description  
V
CCIO (V)  
Unit  
Commercial Maximum  
3.0  
2.5  
1.8  
1.5  
1.2  
30  
30  
40  
50  
50  
40  
40  
50  
50  
50  
%
%
%
%
%
Series OCT without  
calibration  
OCT calibration is automatically performed at device power-up for OCT-enabled  
I/Os.  
Table 1–9 lists the OCT calibration accuracy at device power-up.  
Table 1–9. Series OCT with Calibration at Device Power-Up Specifications for Cyclone IV Devices  
Calibration Accuracy  
Industrial, Extended  
industrial, and  
Automotive Maximum  
Description  
VCCIO (V)  
Unit  
Commercial Maximum  
3.0  
2.5  
1.8  
1.5  
1.2  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
%
%
%
%
%
Series OCT with  
calibration at device  
power-up  
Cyclone IV Device Handbook,  
Volume 3  
March 2016 Altera Corporation  

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Field Programmable Gate Array, 3491 CLBs, 472.5MHz, 55856-Cell, PBGA484, 23 X 23 MM, 1 MM
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Cyclone IV Device Datasheet
EP4CE55F23C8N INTEL

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Field Programmable Gate Array, 3491 CLBs, 472.5MHz, 55856-Cell, PBGA484, 23 X 23 MM, 1 MM
EP4CE55F23I7 INTEL

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暂无描述
EP4CE55F23I7 ALTERA

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Field Programmable Gate Array, 3491 CLBs, 472.5MHz, 55856-Cell, PBGA484, 23 X 23 MM, 1 MM
EP4CE55F23I7N ALTERA

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1. Cyclone IV FPGA Device Family Overview