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EP3SL340F1517C4L PDF预览

EP3SL340F1517C4L

更新时间: 2024-02-06 13:21:29
品牌 Logo 应用领域
阿尔特拉 - ALTERA 时钟LTE可编程逻辑
页数 文件大小 规格书
331页 1711K
描述
Field Programmable Gate Array, 717MHz, 337500-Cell, CMOS, PBGA1517, FBGA-1517

EP3SL340F1517C4L 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:BGA, BGA1517,39X39,40
针数:1517Reach Compliance Code:not_compliant
ECCN代码:3A001.A.7.AHTS代码:8542.39.00.01
风险等级:5.22其他特性:IT CAN ALSO OPERATE FROM 1.05 TO 1.15V SUPPLY
最大时钟频率:717 MHzJESD-30 代码:S-PBGA-B1517
JESD-609代码:e0长度:40 mm
湿度敏感等级:4输入次数:976
逻辑单元数量:337500输出次数:976
端子数量:1517最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA1517,39X39,40
封装形状:SQUARE封装形式:GRID ARRAY
电源:1.2/3.3 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:3.9 mm
子类别:Field Programmable Gate Arrays最大供电电压:0.94 V
最小供电电压:0.86 V标称供电电压:0.9 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn63Pb37)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:40 mm
Base Number Matches:1

EP3SL340F1517C4L 数据手册

 浏览型号EP3SL340F1517C4L的Datasheet PDF文件第2页浏览型号EP3SL340F1517C4L的Datasheet PDF文件第3页浏览型号EP3SL340F1517C4L的Datasheet PDF文件第4页浏览型号EP3SL340F1517C4L的Datasheet PDF文件第5页浏览型号EP3SL340F1517C4L的Datasheet PDF文件第6页浏览型号EP3SL340F1517C4L的Datasheet PDF文件第7页 
1. Stratix III Device Data Sheet: DC and  
Switching Characteristics  
SIII52001-2.1  
Electrical Characteristics  
Operating Conditions  
®
When Stratix III devices are implemented in a system, they are rated according to a  
set of defined parameters. To maintain the highest possible performance and  
reliability of Stratix III devices, system designers must consider the operating  
requirements discussed in this chapter. Stratix III devices are offered in both  
commercial and industrial grades. Commercial devices are offered in –2 (fastest), –3,  
–4 and –4L speed grades. Industrial devices are offered only in –3, –4, and –4L speed  
grades.  
1
In this chapter, a prefix associated with the operating temperature range is attached to  
the speed grades; commercial with “C” prefix and industrial with “I” prefix.  
Commercial devices are therefore indicated as C2, C3, C4, and C4L per respective  
speed grades. Industrial devices are indicated as I3, I4, and I4L.  
Absolute Maximum Ratings  
Absolute maximum ratings define the maximum operating conditions for Stratix III  
devices. The values are based on experiments conducted with the device and  
theoretical modeling of breakdown and damage mechanisms. The functional  
operation of the device is not implied at these conditions. Conditions beyond those  
listed in Table 1–1 may cause permanent damage to the device. Additionally, device  
operation at the absolute maximum ratings for extended periods may have adverse  
effects on the device.  
Table 1–1. Stratix III Device Absolute Maximum Ratings (Note 1) (Part 1 of 2)  
Symbol  
Parameter  
Selectable core voltage power supply  
I/O registers power supply  
Minimum  
-0.5  
Maximum  
1.65  
1.65  
1.65  
3.75  
3.75  
3.9  
Unit  
V
VCCL  
VCC  
-0.5  
V
VCCD_PLL  
VCCA_PLL  
VCCPT  
VCCPGM  
VCCPD  
VCCIO  
PLL digital power supply  
-0.5  
V
PLL analog power supply  
-0.5  
V
Programmable power technology power supply  
Configuration pins power supply  
I/O pre-driver power supply  
I/O power supply  
-0.5  
V
-0.5  
V
-0.5  
3.9  
V
-0.5  
3.9  
V
Differential clock input power supply (top and bottom I/O  
banks only)  
VCC_CLKIN  
-0.5  
3.75  
V
Battery back-up power supply for design security volatile  
key register  
VCCBAT  
VI  
-0.5  
-0.5  
3.75  
4.0  
V
V
DC Input voltage  
© July 2009 Altera Corporation  
Stratix III Device Handbook, Volume 2  
 

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