Datasheet > EP1400SJETTPDL-2.820142MTR

EP1400SJETTPDL-2.820142MTR

更新时间： 2024-11-14 07:30:47

品牌	Logo	应用领域
日蚀 - ECLIPTEK		输出元件
页数	文件大小	规格书
9页	939K
描述
CRYSTAL OSCILLATOR, CLOCK, TTL OUTPUT

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Ecliptek | EP14 Series Oscillator

http://www.ecliptek.com/oscillators/EP14/

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EP14 Series Oscillator

Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc J-Lead 9.8mm x 14.0mm Plastic Surface Mount (SMD)

2011/65 +

168 SVHC

2015/863

Revision F 03/25/2014

Electrical Specifications

Nominal Frequency

1.000MHz to 125.000MHz

Some frequencies within this range may not be available.

Frequency Tolerance/Stability

(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency

Stability over the Operating Temperature Range, Supply Voltage

Change, Output Load Change, First Year Aging at 25°C, Shock, and

Vibration)

±100ppm Maximum

±50ppm Maximum

Operating Temperature Range

-20°C to +70°C

-40°C to +85°C

Supply Voltage (V

Input Current

)

5.0V

±10%

45mA Maximum (Unloaded)

Output Voltage Logic High (V

)

2.4V

Minimum with TTL Load, V -0.4V

Minimum with HCMOS

Load, IOH = -16mA

Output Voltage Logic Low (V

Duty Cycle

)

0.4V

Maximum, IOL = +16mA

Measured at 1.4V

with TTL Load; Measured at 50% of waveform

with HCMOS Load

50 ±10(%)

50 ±5(%) (Not available with Output Logic Type of TTL over Nominal

Frequency of 27.000001MHz to 125MHz; Not available with Output

Logic Type of CMOS over Nominal Frequency range of 50.000001MHz

to 125MHz)

Rise Time/Fall Time

Load Drive Capability

4nSec Maximum (Measured at 20% to 80% of waveform) at Output

Logic Type of CMOS

4nSec Maximum (Measured at 0.8V

to 2.0V ) at Output Logic Type

of TTL

50pF HCMOS Load Maximum over Nominal Frequency of 1MHz to

50MHz at Output Logic Type of CMOS

15pF HCMOS Load Maximum over Nominal Frequency of

50.000001MHz to 125MHz at Output Logic Type of CMOS

10TTL Load Maximum over Nominal Frequency of 1MHz to 40MHz at

Output Logic Type of TTL

5TTL Load Maximum over Nominal Frequency of 40.000001MHz to

125MHz at Output Logic Type of TTL

Output Logic Type

Pin 1 Connection

CMOS

TTL

Power Down (Disable Output: Logic Low)

Tri-State (Disabled Output: High Impedance

Tri-State Input Voltage (Vih and Vil)

Standby Current

+2.0V

Minimum to enable output, +0.8V Maximum to disable

output, No Connect to enable output.

50µA Maximum (Pin 1 = Ground)

1 of 9

28-Jan-2016 2:01 PM

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EP1400SJETTPDL-4.608M	ECLIPTEK	获取价格	TTL, Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc J-Lead 9.8mm x 14.
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