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EN39SL800-70BIP PDF预览

EN39SL800-70BIP

更新时间: 2024-11-29 06:57:15
品牌 Logo 应用领域
EON 闪存
页数 文件大小 规格书
45页 471K
描述
8 Megabit (512K x 16-bit) Flash Memory With 4Kbytes Uniform Sector, CMOS 1.8 Volt-only

EN39SL800-70BIP 数据手册

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EN39SL800  
EN39SL800  
8 Megabit (512K x 16-bit) Flash Memory With 4Kbytes Uniform Sector,  
CMOS 1.8 Volt-only  
FEATURES  
Single power supply operation  
- Full voltage range: 1.65-1.95 volt for read and  
write operations.  
High performance program/erase speed  
- Word program time: 8µs typical  
- Sector erase time: 90ms typical  
- Block erase time: 180ms typical  
- Chip erase time: 2s typical  
- Ideal for battery-powered applications.  
High performance  
- Access times as fast as 70 ns  
JEDEC Standard Embedded Erase and  
Program Algorithms  
Low power consumption (typical values at 5  
MHz)  
JEDEC standard DATA# polling and toggle  
- 5 mA typical active read current  
- 15 mA typical program/erase current  
- 0.2 μA typical standby current  
bits feature  
Single Sector, Block and Chip Erase  
Erase Suspend / Resume modes:  
Read or program another Sector/Block during  
Erase Suspend Mode  
Uniform Sector Architecture:  
- 256 sectors of 2-Kword  
- 16 blocks of 32-Kword  
- Any sector or block can be erased individually  
Low Vcc write inhibit < 1.2V  
Block protection:  
Minimum 100K endurance cycle  
-
Hardware locking of blocks to prevent  
program or erase operations within  
individual blocks  
Package Options  
- 48-ball 6mm x 8mm TFBGA  
- 48-ball 4mm x 6mm WFBGA  
Chip Unprotect Mode  
Industrial temperature Range  
GENERAL DESCRIPTION  
The EN39SL800 is an 8-Megabit, electrically erasable, read/write non-volatile flash memory,  
organized as 524,288 words. Any word can be programmed typically in 8µs.The EN39SL800 features 1.8V  
voltage read and write operation, with access time as fast as 70ns to eliminate the need for WAIT  
statements in high-performance microprocessor systems.  
The EN39SL800 has separate Output Enable (OE#), Chip Enable (CE#), and Write Enable (WE#) controls,  
which eliminate bus contention issues. This device is designed to allow either single Sector/Block or full  
chip erase operation, where each block can be individually protected against program/erase operations or  
chip unprotected to erase or program. The device can sustain a minimum of 100K program/erase cycles on  
each sector or block.  
This Data Sheet may be revised by subsequent versions  
or modifications due to changes in technical specifications.  
©2004 Eon Silicon Solution, Inc.,  
www.eonssi.com  
1
Rev. G, Issue Date: 2009/08/18  

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