Precautions on the use of Multilayer Ceramic Capacitors
■PRECAUTIONS
1. Circuit Design
◆Verification of operating environment, electrical rating and performance
1. A malfunction of equipment in fields such as medical, aerospace, nuclear control, etc. may cause serious harm to human life or have
severe social ramifications.
Therefore, any capacitors to be used in such equipment may require higher safety and reliability, and shall be clearly differentiated from
them used in general purpose applications.
Precautions
◆Operating Voltage （Verification of Rated voltage）
1. The operating voltage for capacitors must always be their rated voltage or less.
If an AC voltage is loaded on a DC voltage, the sum of the two peak voltages shall be the rated voltage or less.
For a circuit where an AC or a pulse voltage may be used, the sum of their peak voltages shall also be the rated voltage or less.
2. Even if an applied voltage is the rated voltage or less reliability of capacitors may be deteriorated in case that either a high frequency AC
voltage or a pulse voltage having rapid rise time is used in a circuit.
2. PCB Design
◆Pattern configurations （Design of Land-patterns）
1. When capacitors are mounted on PCBs, the amount of solder used （size of fillet） can directly affect the capacitor performance.
Therefore, the following items must be carefully considered in the design of land patterns:
（1）Excessive solder applied can cause mechanical stresses which lead to chip breaking or cracking. Therefore, please consider
appropriate land-patterns for proper amount of solder.
Precautions
（2）When more than one component are jointly soldered onto the same land, each component's soldering point shall be separated by
solder-resist.
◆Pattern configurations （Capacitor layout on PCBs）
After capacitors are mounted on boards, they can be subjected to mechanical stresses in subsequent manufacturing processes （PCB
cutting, board inspection, mounting of additional parts, assembly into the chassis, wave soldering of the boards, etc.）. For this reason, land
pattern configurations and positions of capacitors shall be carefully considered to minimize stresses.
◆Pattern configurations （Design of Land-patterns）
The following diagrams and tables show some examples of recommended land patterns to prevent excessive solder amounts.
（1）Recommended land dimensions for typical chip capacitors
●Multilayer Ceramic Capacitors : Recommended land dimensions
Land patterns for PCBs
Land pattern
（unit: mm）
Solder-resist
Wave-soldering
Chip capacitor
Type
107
1.6
212
2.0
316
3.2
325
3.2
L
C
Size
W
0.8
1.25
1.6
2.5
A
B
C
0.8 to 1.0
0.5 to 0.8
0.6 to 0.8
1.0 to 1.4
0.8 to 1.5
0.9 to 1.2
1.8 to 2.5
0.8 to 1.7
1.2 to 1.6
1.8 to 2.5
0.8 to 1.7
1.8 to 2.5
B
A
B
Chip capacitor
W
L
Reflow-soldering
Type 042
Technical
063
0.6
105
1.0
107
1.6
0.8
212
2.0
316
325
432
4.5
considerations
L
0.4
3.2
3.2
2.5
Size
W
0.2
0.3
0.5
1.25
1.6
3.2
A
B
C
0.15 to 0.25
0.15 to 0.20
0.15 to 0.30
0.20 to 0.30
0.20 to 0.30
0.25 to 0.40
0.45 to 0.55
0.40 to 0.50
0.45 to 0.55
0.8 to 1.0
0.8 to 1.2
0.8 to 1.2
0.9 to 1.6
1.8 to 2.5
1.0 to 1.5
1.2 to 2.0
1.8 to 2.5
1.0 to 1.5
1.8 to 3.2
2.5 to 3.5
1.5 to 1.8
2.3 to 3.5
0.6 to 0.8
0.6 to 0.8
Note：Recommended land size might be different according to the allowance of the size of the product.
LWDC
●LWDC: Recommended land dimensions for reflow-soldering
（unit: mm）
Type
105
0.52
107
0.8
212
1.25
L
W
Size
W
1.0
1.6
2.0
A
B
C
0.18 to 0.22
0.2 to 0.25
0.9 to 1.1
0.25 to 0.3
0.3 to 0.4
1.5 to 1.7
0.5 to 0.7
0.4 to 0.5
1.9 to 2.1
L
▶ This catalog contains the typical specification only due to the limitation of space. When you consider the purchase of our products, please check our specification.
For details of each product (characteristics graph, reliability information, precautions for use, and so on), see our Web site (http://www.ty-top.com/) .
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