Datasheet > EMF25P02VA

EMF25P02VA

更新时间： 2024-11-07 17:15:35

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	177K
描述
DFN2.0X2.0-06

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EMF25P02VA 数据手册

EMF25P02VA

P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

Bottom View

BV^DSS

‐20V

25mΩ

‐7.8A

DSON (MAX.)

PIN 1

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±8

UNIT

Gate‐Source Voltage

V_GS

T_A= 25 °C

‐7.8

Continuous Drain Current

I_D

T_A= 70 °C

‐5.8

Pulsed Drain Current¹

I_DM

‐31.2

2.08

T_A= 25 °C

Power Dissipation

P_D

°C

T_A= 70 °C

1.33

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

Junction‐to‐Ambient³

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³60°C / W when mounted on a 1 in²pad of 2 oz copper.

2013/11/13

p.1

12 3 4 5

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