93LC46/56/57/66/86
PIN CAPACITANCE
Symbol
Test
Conditions
VOUT=0V
VIN=0V
Min
Typ
Max
5
Units
pF
(3)
COUT
Output Capacitance (DO)
(3)
CIN
Input Capacitance (CS, SK, DI, ORG)
5
pF
INSTRUCTION SET
(2)
Instruction Device Start Opcode
Address
Data
x8 x16
Comments
PE
Type
Bit
x8
x16
READ
ERASE
WRITE
EWEN
EWDS
ERAL
93LC46
93LC56(1)
93LC66
93LC57
93LC86
1
10
10
10
10
10
A6-A0
A8-A0
A8-A0
A7-A0
A10-A0
A5-A0
A7-A0
A7-A0
A6-A0
A9-A0
Read Address AN–A0
1
1
1
1
X
I
93LC46
93LC56(1)
93LC66
93LC57
93LC86
1
1
1
1
1
11
11
11
11
11
A6-A0
A8-A0
A8-A0
A7-A0
A10-A0
A5-A0
A7-A0
A7-A0
A6-A0
A9-A0
Clear Address AN–A0
93LC46
93LC56(1)
93LC66
93LC57
93LC86
1
1
1
1
1
01
01
01
01
01
A6-A0
A8-A0
A8-A0
A7-A0
A10-A0
A5-A0
A7-A0
A7-A0
A6-A0
A9-A0
D7-D0 D15-D0 Write Address AN–A0
D7-D0 D15-D0
D7-D0 D15-D0
D7-D0 D15-D0
D7-D0 D15-D0
I
93LC46
93LC56
93LC66
93LC57
93LC86
1
1
1
1
1
00
00
00
00
00
11XXXXX
11XXXXXXX
11XXXXXXX
11XXXXXX
11XXXX
11XXXXXX
11XXXXXX
11XXXXX
Write Enable
Write Disable
11XXXXXXXXX 11XXXXXXXX
X
X
I
93LC46
93LC56
93LC66
93LC57
93LC86
1
1
1
1
1
00
00
00
00
00
00XXXXX
00XXXXXXX
00XXXXXXX
00XXXXXX
00XXXX
00XXXXXX
00XXXXXX
00XXXXX
00XXXXXXXXX 00XXXXXXXX
93LC46
93LC56
93LC66
93LC57
93LC86
1
1
1
1
1
00
00
00
00
00
10XXXXX
10XXXXXXX
10XXXXXXX
10XXXXXX
10XXXX
10XXXXXX
10XXXXXX
10XXXXX
Clear All Addresses
10XXXXXXXXX 10XXXXXXXX
WRAL
93LC46
93LC56
93LC66
93LC57
93LC86
1
1
1
1
1
00
00
00
00
00
01XXXXX
01XXXXXXX
01XXXXXXX
01XXXXXX
01XXXX
01XXXXXX
01XXXXXX
01XXXXX
D7-D0 D15-D0
D7-D0 D15-D0
D7-D0 D15-D0
D7-D0 D15-D0
Write All Addresses
01XXXXXXXXX 01XXXXXXXX D7-D0 D15-D0
I
Note:
(1) Address bit A8 for 256x8 ORG and A7 for 128x16 ORG are "Don't Care" bits, but must be kept at either a "1" or "0" for READ, WRITE
and ERASE commands.
(2) Applicable only to 93LC86
(3) This parameter is tested initially and after a design or process change that affects the parameter.
Doc. No. 1023, Rev. G
3