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EM351_12 PDF预览

EM351_12

更新时间: 2024-11-05 12:50:39
品牌 Logo 应用领域
芯科 - SILICON /
页数 文件大小 规格书
244页 3868K
描述
High-Performance, Integrated ZigBee/802.15.4 System-on-Chip

EM351_12 数据手册

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EM351 / EM357  
High-Performance, Integrated ZigBee/802.15.4 System-on-Chip  
Complete System-on-Chip  
Exceptional RF Performance  
.
.
32-bit ARM® Cortex-M3 processor  
Normal mode link budget up to 103 dB;  
configurable up to 110 dB  
2.4 GHz IEEE 802.15.4-2003 transceiver & lower  
MAC  
-100 dBm normal RX sensitivity;  
configurable to -102 dBm  
(1% PER, 20 byte packet)  
128 or 192 kB flash, with optional read  
protection  
+3 dB normal mode output power;  
configurable up to +8 dBm  
12 kB RAM memory  
AES128 encryption accelerator  
Robust Wi-Fi and Bluetooth coexistence  
Flexible ADC, UART/SPI/TWI serial  
communications, and general purpose timers  
Innovative network and processor debug  
.
.
Packet Trace Port for non-intrusive  
packet trace with Ember development  
tools  
24 highly configurable GPIOs with Schmitt  
trigger inputs  
Industry-leading ARM® Cortex-M3 processor  
.
.
Serial Wire/JTAG interface  
Leading 32-bit processing performance  
Highly efficient Thumb-2 instruction set  
Operation at 6, 12, or 24 MHz  
Standard ARM debug capabilities: Flash  
Patch & Breakpoint; Data Watchpoint &  
Trace; Instrumentation Trace Macrocell  
Flexible Nested Vectored Interrupt Controller  
Application Flexibility  
Low power consumption, advanced management  
Single voltage operation: 2.1-3.6 V  
with internal 1.8 V and 1.25 V regulators  
Rx Current (w/ CPU): 26 mA  
Optional 32.768 kHz crystal for higher  
timer accuracy  
Tx Current (w/ CPU, +3 dBm TX): 31 mA  
Low deep sleep current, with retained RAM and  
GPIO: 400 nA without/800 nA with sleep timer  
Low external component count with  
single 24 MHz crystal  
Low-frequency internal RC oscillator for low-  
power sleep timing  
Support for external power amplifier  
Small 7x7 mm 48-pin QFN package  
High-frequency internal RC oscillator for fast  
(110 µsec) processor start-up from sleep  
TX_ACTIVE  
PA select  
Data  
RAM  
12 kB  
Program  
RF_TX_ALT_P,N  
Flash  
128/192 kB  
SYNTH  
PA  
DAC  
MAC  
PA  
2 level  
Interrupt  
+
RF_P,N  
nd  
®
TM  
Baseband  
ARM Cortex -M3  
LNA  
ADC  
IF  
CPU with NVIC  
and MPU  
controller  
Packet Trace  
Bias  
OSCA  
OSCB  
CPU debug  
HF crystal  
OSC  
Encryption  
acclerator  
TPIU/ITM/  
FPB/DWT  
Calibration  
ADC  
Internal HF  
RC-OSC  
General  
purpose  
VDD_CORE  
VREG_OUT  
Always  
Powered  
1.25V  
Regulator  
timers  
SWCLK,  
JTCK  
Serial  
GPIO  
Domain  
Wire and  
1.8V  
Regulator  
JTAG  
debug  
registers  
Watchdog  
General  
nRESET  
Purpose  
ADC  
POR  
UART/  
SPI/TWI  
Silicon Laboratories Inc.  
400 West Cesar Chavez  
Austin, TX 78701  
Chip  
manager  
Sleep  
timer  
LF crystal  
OSC  
Internal LF  
RC-OSC  
GPIO multiplexor switch  
Tel: 1+(512) 416-8500  
Fax: 1+(512) 416-9669  
Toll Free: 1+(877) 444-3032  
www.silabs.com  
PA[7:0], PB[7:0], PC[7:0]  
120-035X-000 Rev. 1.2  
Final  

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