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EL4450CN PDF预览

EL4450CN

更新时间: 2024-01-15 10:21:11
品牌 Logo 应用领域
英特矽尔 - INTERSIL 光电二极管
页数 文件大小 规格书
10页 170K
描述
Wideband Four-Quadrant Multiplier

EL4450CN 技术参数

生命周期:Transferred包装说明:SO-14
Reach Compliance Code:unknown风险等级:5.71
模拟集成电路 - 其他类型:ANALOG MULTIPLIER OR DIVIDER标称带宽:90 MHz
JESD-30 代码:R-PDSO-G14负电源电压最大值(Vsup):-15 V
负电源电压最小值(Vsup):-5 V标称负供电电压 (Vsup):-5 V
最大负输入电压:-2 V功能数量:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
最大正输入电压:2 V认证状态:Not Qualified
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):5 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子位置:DUALBase Number Matches:1

EL4450CN 数据手册

 浏览型号EL4450CN的Datasheet PDF文件第3页浏览型号EL4450CN的Datasheet PDF文件第4页浏览型号EL4450CN的Datasheet PDF文件第5页浏览型号EL4450CN的Datasheet PDF文件第7页浏览型号EL4450CN的Datasheet PDF文件第8页浏览型号EL4450CN的Datasheet PDF文件第9页 
EL4450  
a metal probe) or an oscilloscope probe on the input will kill  
Applications Information  
the oscillation. Normal high-frequency construction obviates  
any such problems, where the input source is reasonably  
close to the input. If this is not possible, one can insert series  
resistors of around to 51to de-Q the inputs.  
The EL4450 is a complete four-quadrant multiplier with  
90MHz bandwidth. It has three sets of inputs; a differential  
multiplying X-input, a differential multiplying Y-input, and  
another differential input which is used to complete a  
feedback loop with the output. Here is a typical connection:  
Signal Amplitudes  
Signal input common-mode voltage must be between (V-)  
+2.5V and (V+) -2.5V to ensure linearity. Additionally, the  
differential voltage on any input stage must be limited to ±6V  
to prevent damage. The differential signal range is ±2V in the  
EL4450. The input range is substantially constant with  
temperature.  
The gain of the feedback divider is H, and  
H = R /(R + R ). The transfer function of the part is:  
G
G
F
V
= A × (1/2 × ((V  
+–V -) × (V +–V -)) +  
INX INX INY INY  
OUT  
O
(V  
–V )).  
REF FB  
V
V
is connected to V  
through a feedback network, so  
FB  
OUT  
= H*V  
. A is the open-loop gain of the amplifier, and  
FB  
OUT  
O
The Ground Pin  
is about 600. The large value of A drives:  
O
The ground pin draws only 6µA maximum DC current, and  
may be biased anywhere between (V-) +2.5V and (V+)  
-3.5V. The ground pin is connected to the IC’s substrate and  
frequency compensation components. It serves as a shield  
within the IC and enhances input stage CMRR over  
frequency, and if connected to a potential other than ground,  
it must be bypassed.  
(1/2 × ((V  
+–V -) × (V  
INX INX  
+–V -)) + (V  
INY INY  
REF  
V
))0.  
FB  
Rearranging and substituting for V  
:
REF  
V
= (1/2 × ((V  
+–V -) × (V +–V -))  
INY INY  
OUT  
+V  
INX  
INX  
= (XY/2 + V  
OUT  
)/H, or V  
)/H  
REF  
REF  
Thus the output is equal to one-half the product of X and Y  
inputs and offset by V , all gained up by the feedback  
Power Supplies  
REF  
divider ratio. The EL4450 is stable for a direct connection  
between V and FB, and the feedback divider may be  
The EL4450 works well on supplies from ±3V to ±15V. The  
supplies may be of different voltages as long as the  
requirements of the GND pin are observed (see the Ground  
Pin section for a discussion). The supplies should be  
bypassed close to the device with short leads. 4.7µF  
tantalum capacitors are very good, and no smaller bypasses  
need be placed in parallel. Capacitors as low as 0.01µF can  
be used if small load currents flow.  
OUT  
used for higher output gain, although with the traditional loss  
of bandwidth.  
It is important to keep the feedback divider’s impedance at  
the FB terminal low so that stray capacitance does not  
diminish the loop’s phase margin. The pole caused by the  
parallel impedance of the feedback resistors and stray  
capacitance should be at least 150MHz; typical strays of 3pF  
thus require a feedback impedance of 360or less.  
Single-polarity supplies, such as +12V with +5V can be  
used, where the ground pin is connected to +5V and V- to  
ground. The inputs and outputs will have to have their levels  
shifted above ground to accommodate the lack of negative  
supply.  
Alternatively, a small capacitor across R can be used to  
F
create more of a frequency-compensated divider. The value  
of the capacitor should scale with the parasitic capacitance  
at the FB input. It is also practical to place small capacitors  
across both the feedback resistors (whose values maintain  
the desired gain) to swamp out parasitics. For instance, two  
10pF capacitors across equal divider resistors for a  
maximum gain of 1 will dominate parasitic effects and allow  
a higher divider resistance.  
The power dissipation of the EL4450 increases with power  
supply voltage, and this must be compatible with the  
package chosen. This is a close estimate for the dissipation  
of a circuit:  
P
=2*I ,max*V + (V –V )*V /R  
S S S O O PAR  
D
where  
I ,max is the maximum supply current  
The REF pin can be used as the output’s ground reference,  
or for DC offsetting of the output, or it can be used to sum in  
another signal.  
S
V is the ± supply voltage (assumed equal)  
S
Input Connections  
V
is the output voltage  
O
The input transistors can be driven from resistive and  
capacitive sources, but are capable of oscillation when  
presented with an inductive input. It takes about 80nH of  
series inductance to make the inputs actually oscillate,  
equivalent to four inches of unshielded wiring or about 6 of  
unterminated input transmission line. The oscillation has a  
characteristic frequency of 500MHz. Placing one’s finger (via  
R
is the parallel of all resistors loading the output  
PAR  
For instance, the EL4450 draws a maximum of 18mA. With  
light loading, R →∞ and the dissipation with ±5V supplies  
PAR  
is 180mW. The maximum supply voltage that the device can  
run on for a given P and the other parameters is:  
D
2
V ,max = (P + V /R  
)/(2I + V /R )  
S
D
O
PAR PAR  
S
O
6

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