LED_ACT.1
ACT[7:0]
ACT[7:0]
LED_BLK.1
LDGA
LDGA
LDGB
LDGB
AUI_BLK.1
LDA[4:0],LDB[4:0]
LDA[4:0],LDB[4:0]
LED_BLKP.1
DO+
DO-
CI+
CI-
CNTRL.1
ACT[7:0]
DO+
DO-
CI+
CI-
DO+
DO-
CI+
CI-
LDGA
ISA_HUB.1
PLDA[4:0],PLDB[4:0]
SLDA[4:0],SLDB[4:0]
LDGB
DI+
DI-
PLDA[4:0],PLDB[4:0]
LDA[4:0],LDB[4:0]
PLDA[4:0],PLDB[4:0]
SLDA[4:0],SLDB[4:0]
BCLK10
B_JAM
ACK
COL
BCLK10
B_JAM
B_DAT
BCLK20
DI+
DI+
DI-
B_DAT
LED_BLKS.1
DI-
AUI_BLKP.1
BCLK20
SELO
PDO+
PDO+
PDO-
PDO+
PDO-
PCI+
PCI-
TXD+[3:0],TXD-[3:0]
RXD+[3:0],RXD-[3:0]
PTXD+[3:0],PTXD-[3:0]
PRXD+[3:0],PRXD-[3:0]
STXD+[3:0],STXD-[3:0]
SRXD+[3:0],SRXD-[3:0]
TXD+[3:0],TXD-[3:0]
RXD+[3:0],RXD-[3:0]
SELO_P
SELO_S
SLDA[4:0],SLDB[4:0]
PDO-
PCI+
PCI-
PCI+
PCI-
PDI+
PDI-
PTXD+[3:0],PTXD-[3:0]
PRXD+[3:0],PRXD-[3:0]
STXD+[3:0],STXD-[3:0]
SRXD+[3:0],SRXD-[3:0]
PDI+
PDI-
PDI+
PDI-
TP.1
S_XBUS.1
TP_INTRF
MCLK
DAT
MCLK
DAT
MCLK
DAT
BCLK10
B_JAM
B_DAT
BCLK20
TXD+[3:0],TXD-[3:0]
ACK
ACK
COL
ACK
RXD+[3:0],RXD-[3:0]
TP_NTRFP
COL
JAM
COL
D[0:7]
D[0:7]
JAM
JAM
CS_S
CS_A
B_SA0
CS_S
SELO
SELO
SELO
SELO_P
SELO_S
R_CLK
PTXD+[3:0],PTXD-[3:0]
CS_A
SELO_P
SELO_S
SELO_P
SELO_S
B_SA0
B_CNTRL0
B_CNTRL1
RDY
PRXD+[3:0],PRXD-[3:0]
B_CNTRL0
B_CNTRL1
TP_NTRFS
RDY
INT
STXD+[3:0],STXD-[3:0]
PCNET.1
INT
B_IRQ[3:5],B_IRQ[9:12],B_IRQ15
RCI+
RCI+
RCI+
SRXD+[3:0],SRXD-[3:0]
RCI-
RDO+
RDO-
RDI+
RDI-
RCI-
RCI-
B_DRQ3,B_DRQ[5:7]
RDO+
RDO-
RDI+
RDI-
RDO+
RDO-
RDI+
RDI-
B_DACK3,B_DACK[5:7]
RSET
B_CNTRL[0:11]
LDC[0:2]
B_SA[0:19]
B_SD[0:15]
LSA[17:23]
D[0:7]
CS_S
CS_A
RDY
BUS_NTRF.1
INT
RSET
R_CLK
RSET
R_CLK
B_SD[0:15]
B_SD[0:15]
B_SA[0:19]
B_SA[0:19]
B_CNTRL[0:11]
B_CNTRL[0:11]
B_DACK3,B_DACK[5:7]
B_DACK3,B_DACK[5:7]
B_DRQ3,B_DRQ[5:7]
B_DRQ3,BDRQ[5:7]
B_IRQ[3:5],B_IRQ[9:12],B_IRQ15
LSA[17:23]
B_IRQ[3:5],B_IRQ[9:12],B_IRQ15
LSA[17:23]
LDC[0:2]
LDC[0:2]
Engineer:Liane T.Aihara Larioza
Technician: Steve Cooper
MAINBD
Title:
Sheet page number
Date & Time
1
7-19-1996_15:22
Advanced Micro Devices
Project
EIM2BD0