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EH3500ETTTS-106.200M PDF预览

EH3500ETTTS-106.200M

更新时间： 2024-11-10 07:29:51
品牌 Logo 应用领域
日蚀 - ECLIPTEK 石英晶振
页数 文件大小 规格书
10页 954K
描述
CMOS, Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)

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EH3500ETTTS-106.200M 数据手册

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Ecliptek | EH35 Series Oscillator  
http://www.ecliptek.com/oscillators/EH35/  
Log On | 714-433-1200 | Email Customer Support  
Home  
Products  
Quick Quote  
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EH35 Series Oscillator  
Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)  
2011/65 +  
168 SVHC  
2015/863  
Revision F 02/27/2015  
ectrical Specifications  
Nominal Frequency  
1.000MHz to 155.520MHz  
Some frequencies within this range may not be available.  
requency Tolerance/Stability  
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency  
Stability over the Operating Temperature Range, Supply Voltage  
Change, Output Load Change, First Year Aging at 25°C, Shock, and  
Vibration)  
±100ppm Maximum  
±50ppm Maximum  
±25ppm Maximum  
±20ppm Maximum  
ging at 25°C  
±5ppm/year Maximum  
Operating Temperature Range  
0°C to +70°C  
-40°C to +85°C  
upply Voltage  
nput Current  
5.0V  
±10%  
DC  
No Load  
50mA Maximum  
Output Voltage Logic High (V  
)
OH  
I
= -16mA  
OH  
2.4V  
Minimum with TTL Load  
Minimum with HCMOS Load  
DC  
DC  
-0.4V  
V
DD  
Output Voltage Logic Low (V  
Duty Cycle  
)
I
= +16mA  
OL  
OL  
0.4V  
0.5V  
Maximum with TTL Load  
DC  
DC  
Maximum with HCMOS Load  
50 ±10(%) Measured at 1.4V  
with TTL Load or at 50% of waveform  
DC  
with HCMOS Load from 1MHz to 70MHz. Measured at 50% of  
waveform above 70MHz.  
50 ±5(%) Measured at 50% of waveform.  
ise Time/Fall Time  
oad Drive Capability  
Measured over 0.8V  
DC  
waveform with HCMOS load.  
6nSec Maximum from 1MHz to 70MHz  
4nSec Maximum from 70.000001MHz to 155.520MHz  
to 2.0V  
with TTL load or from 20% to 80% of  
DC  
10 TTL Load or 50pF HCMOS Load Maximum from 1MHz to 70MHz  
5 TTL Load or 15pF HCMOS Load Maximum from 70.000001MHz to  
155.520MHz  
Output Logic Type  
in 1 Connection  
CMOS  
Tri-State (Disabled Output: High Impedance)  
ri-State Input Voltage (Vih and Vil)  
bsolute Clock Jitter  
+2.2V  
+0.8V  
Minimum or No Connect to Enable Output  
Maximum to Disable Output (High Impedance)  
DC  
DC  
±250pSec Maximum, ±100pSec Typical  
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28-Jan-2016 1:04 PM  
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