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EG-2021CA71.5MCHPA PDF预览

EG-2021CA71.5MCHPA

更新时间: 2024-11-14 09:58:03
品牌 Logo 应用领域
精工 - SEIKO 机械振荡器
页数 文件大小 规格书
3页 49K
描述
LVCMOS Output Clock Oscillator, 71.5MHz Nom,

EG-2021CA71.5MCHPA 数据手册

 浏览型号EG-2021CA71.5MCHPA的Datasheet PDF文件第2页浏览型号EG-2021CA71.5MCHPA的Datasheet PDF文件第3页 
EG-2021CA  
Preliminary  
2.5V LVCMOS Output Oscillator  
Features  
Generates high frequency clock from a high stability SAW (Surface Acoustic Wave) resonator.  
2.5V-CMOS output.  
Very low jitter/low phase noise.  
Small SMD in 7x5mm, Max1.4mm height, ceramic package.  
Applications  
Ethernet, Fibre channel, InfiniBand, PCI-Express, RapidIO, Hypertransport, SONET etc.  
Absolute Maximum Ratings  
Item  
Supply Voltage  
Storage temperature  
Solder heat resistance  
Symbol  
Unit  
MIN.  
TYP.  
MAX.  
Condition  
VCC  
Tstg  
Tsol  
V
°C  
-0.5  
-40  
+4.0  
+100  
VDD – GND  
Stored as bare product.  
Max. 240°C x Max. 10s x 2 times  
Operating range  
Item  
Symbol  
Unit  
MIN.  
TYP.  
2.5  
MAX.  
Condition  
Supply voltage  
Operating temperature  
VDD  
Topr  
V
°C  
2.375  
0
-5  
2.625  
+70  
+85  
15  
P version  
R version  
Output load  
CL  
pF  
Frequency characteristics  
(VDD=2.375 to 2.625,GND=0.0V,Load=Max,)  
Item  
Symbol  
Unit  
MIN.  
62.5  
TYP.  
MAX.  
170  
Condition  
Output frequency Range  
Frequency Stability  
fosc  
df/f0  
MHz  
ppm  
+/-100  
+/-50  
H stability, *1  
G stability, *1  
*1 This includes initial frequency tolerance, temperature, supply voltage variation and loading variation.  
Electrical characteristics  
(VDD=2.375 to 2.625,GND=0.0V,Load=Max)  
Item  
Symbol  
Unit  
MIN.  
TYP.  
MAX.  
Condition  
t=0 at VDD=2.375V  
CL=15pF  
No Load  
OE=GND  
20-80% of (VOH-VOL)  
80-20% of (VOH-VOL)  
at 50% VDD  
IOH=-8mA  
IOL=8mA  
Start up time  
Tosc  
IOP  
ms  
mA  
mA  
mA  
ns  
10  
Current consumption  
20  
15  
TBD  
TBD  
0.6  
TBD  
TBD  
55  
Output disable current  
Rise time  
IOE  
tTLH  
tTHL  
tw/t  
VOH  
VOL  
VIH  
VIL  
1.0  
1.0  
Fall time  
Duty  
ns  
45  
VDD -0.4  
High level output voltage  
Low level output voltage  
High level input voltage  
Low level input voltage  
Phase Jitter *2  
V
V
V
0.4  
0.7VDD  
OE Terminal  
OE Terminal  
V
0.3VDD  
tPJ  
UI  
ps  
ps  
ps  
ps  
0.027x10-3  
RMS, @62.5 to 170MHz  
RMS, @125MHz  
σ of Random Jitter  
Peak to Peak of jitter distribution  
σ of Total jitter distribution  
12KHz to 20MHz offset  
0.21  
3
25  
4
Period Jitter *3  
n=50000 samples  
tRJ  
tp-p  
tacc  
4
40  
5
Accumulated Jitter *3  
n=2 to 50000 cycles  
*2 Measured by SSB phase noise test equipment. *3 Measured by Time interval analyzer or oscilloscope.  
EG2021 Rev.0.6 35I  
EPSON ELECTRONICS AMERICA, INC.  
www.eea.epson.com  

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