EBE20AE4ACFA-6E-E

更新时间： 2024-02-08 06:38:52

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EBE20AE4ACFA-6E-E 数据手册

EBE20AE4ACFA

CKE (input pin)

CKE controls power down and self-refresh. The power down and the self-refresh commands are entered when the

CKE is driven low and exited when it resumes to high.

The CKE level must be kept for 1 CK cycle at least, that is, if CKE changes at the cross point of the CK rising edge

and the VREF level with proper setup time tIS, at the next CK rising edge CKE level must be kept with proper hold

time tIH.

DQ, CB (input and output pins)

Data are input to and output from these pins.

DQS (input and output pin)

DQS and /DQS provide the read data strobes (as output) and the write data strobes (as input).

VDD (power supply pins)

1.8V is applied. (VDD is for the internal circuit.)

VDDSPD (power supply pin)

1.8V is applied (For serial EEPROM).

VSS (power supply pin)

Ground is connected.

/RESET(input pin)

LVCMOS reset input. When /RESET is Low, all registers are reset.

Par_IN (Parity input pin)

Parity bit for the address and control bus.

/Err_Out (Error output pin)

Parity error found on the address and control bus.

Detailed Operation Part and Timing Waveforms

Refer to the EDE1104ACSE, EDE1108ACSE, EDE1116ACSE datasheet (E0975E). DM pins of component device

fixed to VSS level on the module board. DIMM /CAS latency = component CL + 1 for registered type.

Data Sheet E1076E30 (Ver. 3.0)

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型号	品牌	获取价格	描述	数据表
EBE20AE4ACFA-8E-E	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM
EBE20AE4ACWA	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM
EBE20AE4ACWA-6E-E	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM
EBE20AE4ACWA-8E-E	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM
EBE20B	ADAM-TECH	获取价格	EURO BLOCKS TS & EB SERIES
EBE20H	ADAM-TECH	获取价格	EURO BLOCKS TS & EB SERIES
EBE20J	ADAM-TECH	获取价格	EURO BLOCKS TS & EB SERIES
EBE20K	ADAM-TECH	获取价格	EURO BLOCKS TS & EB SERIES
EBE20RE4AAFA	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 1 Rank)
EBE20RE4AAFA-4A-E	ELPIDA	获取价格	2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 1 Rank)