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EBD11UD8ADFB-6B-E PDF预览

EBD11UD8ADFB-6B-E

更新时间: 2024-01-27 13:57:30
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
19页 187K
描述
DDR DRAM Module, 128MX64, 0.7ns, CMOS, DIMM-184

EBD11UD8ADFB-6B-E 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIMM包装说明:DIMM,
针数:184Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.36
风险等级:5.84访问模式:DUAL BANK PAGE BURST
最长访问时间:0.7 ns其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-XDMA-N184JESD-609代码:e4
内存密度:8589934592 bit内存集成电路类型:DDR DRAM MODULE
内存宽度:64功能数量:1
端口数量:1端子数量:184
字数:134217728 words字数代码:128000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128MX64
封装主体材料:UNSPECIFIED封装代码:DIMM
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度):260认证状态:Not Qualified
自我刷新:YES最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Gold (Au)
端子形式:NO LEAD端子位置:DUAL
处于峰值回流温度下的最长时间:50Base Number Matches:1

EBD11UD8ADFB-6B-E 数据手册

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EBD11UD8ADFB  
CAUTION FOR HANDLING MEMORY MODULES  
When handling or inserting memory modules, be sure not to touch any components on the modules, such as  
the memory ICs, chip capacitors and chip resistors. It is necessary to avoid undue mechanical stress on  
these components to prevent damaging them.  
In particular, do not push module cover or drop the modules in order to protect from mechanical defects,  
which would be electrical defects.  
When re-packing memory modules, be sure the modules are not touching each other.  
Modules in contact with other modules may cause excessive mechanical stress, which may damage the  
modules.  
MDE0202  
NOTES FOR CMOS DEVICES  
PRECAUTION AGAINST ESD FOR MOS DEVICES  
1
Exposing the MOS devices to a strong electric field can cause destruction of the gate  
oxide and ultimately degrade the MOS devices operation. Steps must be taken to stop  
generation of static electricity as much as possible, and quickly dissipate it, when once  
it has occurred. Environmental control must be adequate. When it is dry, humidifier  
should be used. It is recommended to avoid using insulators that easily build static  
electricity. MOS devices must be stored and transported in an anti-static container,  
static shielding bag or conductive material. All test and measurement tools including  
work bench and floor should be grounded. The operator should be grounded using  
wrist strap. MOS devices must not be touched with bare hands. Similar precautions  
need to be taken for PW boards with semiconductor MOS devices on it.  
2
HANDLING OF UNUSED INPUT PINS FOR CMOS DEVICES  
No connection for CMOS devices input pins can be a cause of malfunction. If no  
connection is provided to the input pins, it is possible that an internal input level may be  
generated due to noise, etc., hence causing malfunction. CMOS devices behave  
differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed  
high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected  
to VDD or GND with a resistor, if it is considered to have a possibility of being an output  
pin. The unused pins must be handled in accordance with the related specifications.  
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES  
Power-on does not necessarily define initial status of MOS devices. Production process  
of MOS does not define the initial operation status of the device. Immediately after the  
power source is turned ON, the MOS devices with reset function have not yet been  
initialized. Hence, power-on does not guarantee output pin levels, I/O settings or  
contents of registers. MOS devices are not initialized until the reset signal is received.  
Reset operation must be executed immediately after power-on for MOS devices having  
reset function.  
CME0107  
Data Sheet E0414E20 (Ver. 2.0)  
18  

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