Datasheet > DV2003S2_14

DV2003S2_14

更新时间： 2024-11-30 01:23:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
6页	929K
描述
Fast Charge Development System Control of On-Board N-FET Switch-Mode Regulator

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DV2003S2_14 数据手册

DV2003S2

Fast Charge Development System

Control of On-Board N-FET

Switch-Mode Regulator

Features

➤

bq2003 fast charge control evaluation and bq2003

fast-charge control evaluation and development

➤

Charge current sourced from an on-board

switch-mode regulator (up to 6.0 A)

➤

Fast charge of 2 to 16 NiCd or NiMH cells

Fast-charge termination by delta temperature/delta

time (∆T/∆t), negative delta voltage (-∆V), maximum

temperature, maximum time, and maximum voltage

➤

-∆V enable, hold-off, top-off, maximum time, and

number of cells are jumper-configurable

Charging status displayed on charge and

temperature LEDs

Discharge-before-charge control with push-button

switch

Inhibit fast charge by external logic-level input

The user provides a power supply and batteries. The user

configures the DV2003S2 for the number of cells, -∆V

charge termination, and maximum charge time (with or

without top-off), and commands the discharge-before-

charge option with the push-button switch S1.

General Description

The DV2003S2 Development System provides a develop-

ment environment for the bq2003 Fast-Charge IC. The

DV2003S2 incorporates a bq2003 and an N-FET buck-

type switch-mode regulator to provide fast charge control

for 2 to 16 NiCd or NiMH cells. The primary difference

between the DV2003S2 and the DV2003S1 is in the

switching FET Q1. The DV2003S1 uses a P-FET for bat-

tery charge currents of 3.0A or less, whereas the

DV2003S2 uses an n-FET to support charge currents up

to 6.0A.

Connection Descriptions

JP6

DC+

DC input from charger supply

Thermistor connection

THERM

DSCHG

BAT+

Low side of discharge load

Review the bq2003 data sheet and the application note,

“Using the bq2003 to Control Fast Charge,” before using

the DV2003S2 board. Also review the application note,

“Step-Down Switching Current Regulation Using the

bq2003,” for information concerning trade-offs between

using P-FET and N-FET transistors for Q1.

Positive battery terminal and high side

of discharge load

BAT–

GND

Negative battery terminal and

thermistor connection

Ground from charger supply

The fast charge is terminated by any of the following: ∆T/

∆t, -∆V, maximum temperature, maximum time, maxi-

mum voltage, or an external inhibit command. Jumper

settings select the -∆V enabled state, and the hold-off,

top-off, and maximum time limits.

JP5

Voltage source for inhibit input

Inhibit input to prevent bq2003 activity

JP1 DVEN

Negative voltage termination enable

10/97

Rev. B Board

12 3 4 5 6

中文翻译

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