Datasheet > DTC113ZS3

DTC113ZS3

更新时间： 2024-11-26 03:00:27

品牌	Logo	应用领域
全宇昕 - CYSTEKEC		晶体数字晶体管
页数	文件大小	规格书
3页	138K
描述
NPN Digital Transistors (Built-in Resistors)

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数据手册

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DTC113ZS3 数据手册

Spec. No. : C350S3

Issued Date : 2005.01.12

Revised Date :

CYStech Electronics Corp.

Page No. : 1/3

NPN Digital Transistors (Built-in Resistors)

DTC113ZS3

Features

• Built-in bias resistors enable the configuration of an inverter circuit without connecting external input

resistors (see equivalent circuit).

• The bias resistors consist of thin-film resistors with complete isolation to allow negative biasing of the

input. They also have the advantage of almost completely eliminating parasitic effects.

• Only the on/off conditions need to be set for operation, making device design easy.

• Complements the DTA113ZS3

Equivalent Circuit

Outline

SOT-323

DTC113ZS3

R1=1kΩ , R2=10 kΩ

IN(B) : Base

OUT(C) : Collector

GND(E) : Emitter

Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

Limits

Unit

Supply Voltage

VCC

VIN

-5~+10

100

Input Voltage

°C

Output Current

IO(max.)

100

Power Dissipation

Junction Temperature

Storage Temperature

200

150

-55~+150

Tstg

°C

DTC113ZS3

CYStek Product Specification

12 3

中文翻译

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