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DSPIC30F4012T-30I/ML PDF预览

DSPIC30F4012T-30I/ML

更新时间: 2024-09-29 15:42:23
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟外围集成电路
页数 文件大小 规格书
66页 569K
描述
16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQCC44, 8 X 8 MM, PLASTIC, QFN-44

DSPIC30F4012T-30I/ML 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFN
包装说明:8 X 8 MM, PLASTIC, QFN-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.18
Is Samacsys:N具有ADC:YES
其他特性:ALSO OPERATES AT 3V MINIMUM SUPPLY AT 15 MHZ地址总线宽度:
位大小:16最大时钟频率:40 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:格式:FIXED-POINT
JESD-30 代码:S-PQCC-N44JESD-609代码:e3
长度:8 mm湿度敏感等级:1
I/O 线路数量:30端子数量:44
片上程序ROM宽度:24最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC44,.32SQ,25封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
RAM(字节):2048RAM(字数):1024
ROM(单词):16384ROM可编程性:FLASH
座面最大高度:1 mm速度:20 MHz
子类别:Digital Signal Processors最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER, RISC
Base Number Matches:1

DSPIC30F4012T-30I/ML 数据手册

 浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第2页浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第3页浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第4页浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第5页浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第6页浏览型号DSPIC30F4012T-30I/ML的Datasheet PDF文件第7页 
dsPIC30F  
dsPIC30F Flash Programming Specification  
Two different methods are used to program the chip in  
the user’s system. One method uses the Enhanced In-  
Circuit Serial Programming™ (Enhanced ICSP™)  
protocol and works with the programming executive.  
The other method uses In-Circuit Serial Programming  
(ICSP) protocol and does not use the programming  
executive.  
1.0  
OVERVIEW AND SCOPE  
This document defines the programming specification  
for the dsPIC30F family of Digital Signal Controllers  
(DSCs). The programming specification is required  
only for the developers of third-party tools that are used  
to program dsPIC30F devices. Customers using  
dsPIC30F devices should use development tools that  
already provide support for device programming.  
The Enhanced ICSP protocol uses the faster, high-  
voltage method that takes advantage of the  
programming executive. The programming executive  
provides all the necessary functionality to erase,  
program and verify the chip through a small command  
set. The command set allows the programmer to  
program the dsPIC30F without having to deal with the  
low-level programming protocols of the chip.  
This document includes programming specifications  
for the following devices:  
• dsPIC30F2010/2011/2012  
• dsPIC30F3010/3011/3012/3013/ 3014  
• dsPIC30F4011/4012/4013  
• dsPIC30F5011/5013/5015/5016  
• dsPIC30F6010/6011/6012/6013/6014/6015  
• dsPIC30F6010A/6011A/6012A/6013A/6014A  
The ICSP programming method does not use the  
programming executive. It provides native, low-level  
programming capability to erase, program and verify  
the chip. This method is significantly slower because it  
uses control codes to serially execute instructions on  
the dsPIC30F device.  
2.0  
PROGRAMMING OVERVIEW  
OF THE dsPIC30F  
This specification describes the ICSP and Enhanced  
The dsPIC30F family of DSCs contains a region of on-  
chip memory used to simplify device programming.  
This region of memory can store a programming  
executive, which allows the dsPIC30F to be  
programmed faster than the traditional means. Once  
the programming executive is stored to memory by an  
external programmer (such as Microchip’s MPLAB®  
ICD 2, MPLAB PM3, PRO MATE® II, or MPLAB REAL  
ICE™), it can then interact with the external  
programmer to efficiently program devices.  
ICSP  
“Programming Executive Application” describes  
the programming executive application and  
Section 5.0 “Device Programming” describes its  
application programmer’s interface for the host  
programming  
methods.  
Section 3.0  
programmer.  
Section 11.0  
“ICSP™  
Mode”  
describes the ICSP programming method.  
2.1  
Hardware Requirements  
In ICSP or Enhanced ICSP mode, the dsPIC30F  
requires two programmable power supplies: one for  
VDD and one for MCLR. For Bulk Erase programming,  
which is required for erasing code protection bits, VDD  
must be greater than 4.5 volts. Refer to Section 13.0  
“AC/DC Characteristics and Timing Requirements”  
for additional hardware parameters.  
The programmer and programming executive have a  
master-slave relationship, where the programmer is  
the master programming device and the programming  
executive is the slave, as illustrated in Figure 2-1.  
FIGURE 2-1:  
OVERVIEW OF dsPIC30F  
PROGRAMMING  
Programmer  
2
Programming  
Executive  
On-chip Memory  
dsPIC30F Device  
© 2010 Microchip Technology Inc.  
DS70102K-page 1  
 

DSPIC30F4012T-30I/ML 替代型号

型号 品牌 替代类型 描述 数据表
DSPIC30F4012-30I/ML MICROCHIP

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