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DSPA56371

更新时间: 2024-11-04 21:53:43
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飞思卡尔 - FREESCALE /
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描述
The DSP56371 is a high density CMOS device with 5.0-volt compatible inputs and outputs.

DSPA56371 数据手册

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DSP56371  
Rev. 3, 1/2005  
Freescale Semiconductor  
Technical Data  
Table of Contents  
Section  
Page  
1
Introduction  
1 Introduction...................................1  
2 DSP56371 Overview.....................1  
3 Signal/Connection Descriptions....8  
4 Maximum Ratings .......................30  
5 Power Requirements...................32  
6 Thermal Characteristics..............32  
7 DC Electrical Characteristics ......33  
8 AC Electrical Characteristics.......34  
9 Internal Clocks............................34  
10 External Clock Operation..........35  
The DSP56371 is a high density CMOS device with 5.0-volt compatible inputs and outputs.  
NOTE  
This document contains information on a new product.  
Specifications and information herein are subject to  
change without notice.  
Finalized specifications may be published after further characterization and device  
qualifications are completed.  
11 Reset, Stop, Mode Select, and  
Interrupt Timing...........................36  
2
DSP56371 Overview  
Introduction  
12 Serial Host Interface SPI Protocol  
Timing..........................................39  
2.1  
13 Serial Host Interface (SHI) I2C  
Protocol Timing ...........................44  
This manual describes the DSP56371 24-bit digital signal processor (DSP), its memory,  
operating modes and peripheral modules. The DSP56371 is a member of the DSP56300  
family of programmable CMOS DSPs. The DSP56371 is targeted to applications that  
require digital audio compression/decompression, sound field processing, acoustic  
equalization and other digital audio algorithms. Changes in core functionality specific to the  
DSP56371 are also described in this manual. See Figure 1. for the block diagram of the  
DSP56371.  
14 Enhanced Serial Audio Interface  
Timing..........................................46  
15 Digital Audio Transmitter Timing51  
16 Timer Timing.............................51  
17 GPIO Timing .............................52  
18 JTAG Timing .............................53  
19 Package Information .................55  
20 Design Considerations..............61  
21 Power Consumption Benchmark63  
22 IBIS Model ................................66  
This document contains certain information on a newproduct.  
Specifications and information herein are subject to change withoutnotice.  
© Freescale Semiconductor, Inc., 2005. All rights reserved.  
DSP56371 Technical Data  

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