May 13, 2008
DS91M040
125 MHz Quad M-LVDS Transceiver
General Description
Features
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The DS91M040 is a quad M-LVDS transceiver designed for
driving / receiving clock or data signals to / from up to four
multipoint networks.
DC - 125 MHz / 250 Mbps low jitter, low skew, low power
operation
Wide Input Common Mode Voltage Range allows up to
±2V of GND noise
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M-LVDS (Multipoint LVDS) is a new family of bus interface
devices based on LVDS technology specifically designed for
multipoint and multidrop cable and backplane applications. It
differs from standard LVDS in providing increased drive cur-
rent to handle double terminations that are required in multi-
point applications. Controlled transition times minimize re-
flections that are common in multipoint configurations due to
unterminated stubs. M-LVDS devices also have a very large
input common mode voltage range for additional noise margin
in heavily loaded and noisy backplane environments.
Conforms to TIA/EIA-899 M-LVDS Standard
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Pin selectable M-LVDS receiver type (1 or 2)
Controlled transition times (2.0 ns typ) minimize reflections
8 kV ESD on M-LVDS I/O pins protects adjoining
components
Flow-through pinout simplifies PCB layout
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Small 5 mm x 5 mm LLP-32 space saving package
A single DS91M040 channel is a half-duplex transceiver that
accepts LVTTL/LVCMOS signals at the driver inputs and con-
verts them to differential M-LVDS signal levels. The receiver
inputs accept low voltage differential signals (LVDS, BLVDS,
M-LVDS, LVPECL and CML) and convert them to 3V LVC-
MOS signals. The DS91M040 supports both M-LVDS type 1
and type 2 receiver inputs.
Applications
Multidrop / Multipoint clock and data distribution
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High-Speed, Low Power, Short-Reach alternative to TIA/
EIA-485/422
Clock distribution in AdvancedTCA (ATCA) and
MicroTCA (μTCA) backplanes
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Typical Application
30042202
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