5秒后页面跳转
DS91M040TSQ PDF预览

DS91M040TSQ

更新时间: 2024-11-24 04:15:23
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
16页 395K
描述
125 MHz Quad M-LVDS Transceiver

DS91M040TSQ 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:5 X 5 MM, LLP-32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.47差分输出:YES
驱动器位数:4高电平输入电流最大值:0.000015 A
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-899; TIA-899JESD-30 代码:S-XQCC-N32
JESD-609代码:e0长度:5 mm
湿度敏感等级:2功能数量:4
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出低电流:0.008 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:4.5 ns接收器位数:4
座面最大高度:0.8 mm子类别:Line Driver or Receivers
最大压摆率:75 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40最大传输延迟:5.5 ns
宽度:5 mmBase Number Matches:1

DS91M040TSQ 数据手册

 浏览型号DS91M040TSQ的Datasheet PDF文件第2页浏览型号DS91M040TSQ的Datasheet PDF文件第3页浏览型号DS91M040TSQ的Datasheet PDF文件第4页浏览型号DS91M040TSQ的Datasheet PDF文件第5页浏览型号DS91M040TSQ的Datasheet PDF文件第6页浏览型号DS91M040TSQ的Datasheet PDF文件第7页 
May 13, 2008  
DS91M040  
125 MHz Quad M-LVDS Transceiver  
General Description  
Features  
The DS91M040 is a quad M-LVDS transceiver designed for  
driving / receiving clock or data signals to / from up to four  
multipoint networks.  
DC - 125 MHz / 250 Mbps low jitter, low skew, low power  
operation  
Wide Input Common Mode Voltage Range allows up to  
±2V of GND noise  
M-LVDS (Multipoint LVDS) is a new family of bus interface  
devices based on LVDS technology specifically designed for  
multipoint and multidrop cable and backplane applications. It  
differs from standard LVDS in providing increased drive cur-  
rent to handle double terminations that are required in multi-  
point applications. Controlled transition times minimize re-  
flections that are common in multipoint configurations due to  
unterminated stubs. M-LVDS devices also have a very large  
input common mode voltage range for additional noise margin  
in heavily loaded and noisy backplane environments.  
Conforms to TIA/EIA-899 M-LVDS Standard  
Pin selectable M-LVDS receiver type (1 or 2)  
Controlled transition times (2.0 ns typ) minimize reflections  
8 kV ESD on M-LVDS I/O pins protects adjoining  
components  
Flow-through pinout simplifies PCB layout  
Small 5 mm x 5 mm LLP-32 space saving package  
A single DS91M040 channel is a half-duplex transceiver that  
accepts LVTTL/LVCMOS signals at the driver inputs and con-  
verts them to differential M-LVDS signal levels. The receiver  
inputs accept low voltage differential signals (LVDS, BLVDS,  
M-LVDS, LVPECL and CML) and convert them to 3V LVC-  
MOS signals. The DS91M040 supports both M-LVDS type 1  
and type 2 receiver inputs.  
Applications  
Multidrop / Multipoint clock and data distribution  
High-Speed, Low Power, Short-Reach alternative to TIA/  
EIA-485/422  
Clock distribution in AdvancedTCA (ATCA) and  
MicroTCA (μTCA) backplanes  
Typical Application  
30042202  
© 2008 National Semiconductor Corporation  
300422  
www.national.com  

与DS91M040TSQ相关器件

型号 品牌 获取价格 描述 数据表
DS91M040TSQ/NOPB TI

获取价格

125MHz 四路 M-LVDS 收发器 | RTV | 32 | -40 to 85
DS91M040TSQE TI

获取价格

IC,LINE TRANSCEIVER,4 DRIVER,4 RCVR,LLCC,32PIN,PLASTIC
DS91M040TSQE/NOPB TI

获取价格

125MHz 四路 M-LVDS 收发器 | RTV | 32 | -40 to 85
DS91M040TSQX TI

获取价格

IC,LINE TRANSCEIVER,4 DRIVER,4 RCVR,LLCC,32PIN,PLASTIC
DS91M040TSQX/NOPB TI

获取价格

125MHz 四路 M-LVDS 收发器 | RTV | 32 | -40 to 85
DS91M047 NSC

获取价格

125 MHz Quad M-LVDS Line Driver
DS91M047 TI

获取价格

125MHz 四路 M-LVDS 线路驱动器
DS91M047TMA NSC

获取价格

125 MHz Quad M-LVDS Line Driver
DS91M047TMA/NOPB NSC

获取价格

IC QUAD LINE DRIVER, PDSO16, 0.150 INCH, ROHS COMPLIANT, SOIC-16, Line Driver or Receiver
DS91M047TMA/NOPB TI

获取价格

125MHz 四路 M-LVDS 线路驱动器 | D | 16 | -40 to 85