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DS90UH925QSQX PDF预览

DS90UH925QSQX

更新时间: 2024-11-15 12:55:27
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
47页 822K
描述
720p 24-bit Color FPD-Link III Serializer with HDCP

DS90UH925QSQX 数据手册

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DS90UH925Q  
720p 24-bit Color FPD-Link III Serializer with HDCP  
General Description  
Features  
The DS90UH925Q serializer, in conjunction with the  
DS90UH926Q deserializer, provides a solution for secure dis-  
tribution of content-protected digital video within automotive  
entertainment systems. This chipset translates a parallel RGB  
Video Interface into a single pair high-speed serialized inter-  
face. The digital video data is protected using the industry  
standard HDCP copy protection scheme. The serial bus  
scheme, FPD-Link III, supports video and audio data trans-  
mission and full duplex control including I2C communication  
over a single differential link. Consolidation of video data and  
control over a single differential pair reduces the interconnect  
size and weight, while also eliminating skew issues and sim-  
plifying system design.  
Integrated HDCP cipher engine with on-chip key storage  
Bidirectional control interface channel interface with I2C  
compatible serial control bus  
Supports high definition (720p) digital video format  
RGB888 + VS, HS, DE and I2S audio supported  
5 – 85MHz PCLK supported  
Single 3.3V Operation with 1.8V or 3.3V compatible  
LVCMOS I/O interface  
AC-coupled STP Interconnect up to 10 meters  
Parallel LVCMOS video inputs  
DC-balanced & scrambled Data w/ Embedded Clock  
HDCP Content protected  
The DS90UH925Q serializer embeds the clock, content pro-  
tects the data payload, and level shifts the signals to high-  
speed low voltage differential signaling. Up to 24 RGB data  
bits are serialized along with three video control signals and  
up to two I2S data inputs.  
Supports HDCP repeater application  
Internal pattern generation  
Low power modes minimize power dissipation  
Automotive grade product: AEC-Q100 Grade 2 qualified  
The DS90UH925Q serializer has a 31-bit parallel LVCMOS  
input interface to accommodate the RGB, video control, and  
I2S audio data.  
>8kV HBM and ISO 10605 ESD rating  
Backward compatible modes  
EMI is minimized by the use of low voltage differential signal-  
ing, data scrambling and randomization and spread spectrum  
clocking compatibility.  
Applications  
Automotive Display for Navigation  
The HDCP cipher engine is implemented in the serializer and  
deserializer. HDCP keys are stored in on-chip memory.  
Rear Seat Entertainment Systems  
Applications Diagram  
30136327  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
PRODUCTION DATA information is current as of  
publication date. Products conform to specifications per  
the terms of the Texas Instruments standard warranty.  
Production processing does not necessarily include  
testing of all parameters.  
301363 SNLS336H  
Copyright © 1999-2012, Texas Instruments Incorporated  

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