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DS8024-RRX+T&R PDF预览

DS8024-RRX+T&R

更新时间: 2024-01-17 01:12:20
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
15页 304K
描述
Microprocessor Circuit, CMOS, PDSO28, SOP-28

DS8024-RRX+T&R 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:compliant
HTS代码:8542.31.00.01Factory Lead Time:6 weeks
风险等级:5.6JESD-30 代码:R-PDSO-G28
长度:17.9 mm端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
座面最大高度:2.65 mm最大供电电压:6 V
最小供电电压:2.7 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

DS8024-RRX+T&R 数据手册

 浏览型号DS8024-RRX+T&R的Datasheet PDF文件第6页浏览型号DS8024-RRX+T&R的Datasheet PDF文件第7页浏览型号DS8024-RRX+T&R的Datasheet PDF文件第8页浏览型号DS8024-RRX+T&R的Datasheet PDF文件第10页浏览型号DS8024-RRX+T&R的Datasheet PDF文件第11页浏览型号DS8024-RRX+T&R的Datasheet PDF文件第12页 
Smart Card Interface  
DS8024  
When a card is inserted into the reader (if PRES is  
active), the host microcontroller can begin an activation  
sequence (start a card session) by pulling CMDVCC  
low. The following events form an activation sequence  
(Figure 3):  
An alternate sequence allows the application to control  
when the clock is applied to the card.  
1) Host: Set RSTIN high.  
2) Host: Set CMDVCC low.  
3) Host: Set RSTIN low between t and t ; CLK will now  
3
5
1) Host: CMDVCC is pulled low.  
start.  
2) DS8024: The internal oscillator changes to high  
4) DS8024: RST stays low until t , then RST becomes  
5
frequency (t ).  
0
the copy of RSTIN.  
3) DS8024: The voltage generator is started  
5) DS8024: RSTIN has no further effect on CLK after t .  
5
(between t and t ).  
0
1
If the applied clock is not needed, set CMDVCC low  
4) DS8024: V  
rises from 0 to 5V or 3V with a con-  
CC  
with RSTIN low. In this case, CLK starts at t (minimum  
3
trolled slope (t = t + 1.5 × T). T is 64 times the  
2
1
200ns after the transition on I/O, see Figure 4); after t ,  
5
internal oscillator period (approximately 25µs).  
RSTIN can be set high to obtain an answer to request  
(ATR) from an inserted smart card. Do not perform acti-  
vation with RSTIN held permanently high.  
5) DS8024: I/O, AUX1, and AUX2 are enabled (t =  
3
t + 4T).  
1
6) DS8024: The CLK signal is applied to the C3 con-  
Active Mode  
tact (t ).  
4
When the activation sequence is completed, the  
DS8024 card interface is in active mode. The host  
microcontroller and the smart card exchange data on  
the I/O lines.  
7) DS8024: RST is enabled (t = t + 7T).  
5
1
CMDVCC  
V
CC  
ATR  
I/O  
CLK  
RSTIN  
RST  
I/OIN  
t
0
t
1
t
2
t
3
t
4
t = t  
5 ACT  
Figure 3. Activation Sequence Using RSTIN and CMDVCC  
_______________________________________________________________________________________  
9

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