Data Sheet
April 2019
DS3102
Stratum 2/3E/3 Timing Card IC with
Synchronous Ethernet Support
General Description
Features
Synchronization for Stratum 2, 3E, 3, 4E and 4
plus SMC, SEC and EEC
The DS3102 is a low-cost, feature-rich timing IC for
telecom timing cards. With 8 input clocks, the device
directly accepts both line timing from a large number of
line cards and external timing from external DS1/E1
BITS transceivers. The DS3102 continually monitors all
input clocks and performs automatic hitless reference
switching if the primary reference fails. The T0 DPLL
complies with the Stratum 2, 3E, 3, 4E and 4
requirements of GR-1244, GR-253, G.812 Types I – IV,
G.813 and G.8262. The highly programmable DS3102
support numerous input and output frequencies
Meets Requirements of GR-1244 Stratum 2 – 4,
GR-253, G.812 Types I – IV, G.813, and G.8262
Stratum 2, 3E or 3 Holdover Accuracy with
Suitable External Oscillator
Programmable Bandwidth: 0.5mHz to 400Hz
Hitless Reference Switching on Loss of Input
Automatic or Manual Phase Build-Out
Frequency Conversion Among SONET/SDH,
PDH, Ethernet, Wireless, and CMTS Rates
8 Input Clocks
including
rates
required
for
SONET/SDH,
Synchronous Ethernet (1G, 10G, and 100Mbps),
wireless base stations, and CMTS systems. PLL
bandwidths from 0.5mHz to 400Hz are supported,
and a wide variety of PLL characteristics and device
features can be configured to meet the needs of
many different applications. Two DS3102 devices can
be configured in a master/slave arrangement for timing
card equipment protection.
Four CMOS/TTL Inputs (≤ 125MHz)
Four LVDS/LVPECL/CMOS/TTL Inputs
(≤ 156.25MHz)
Three Optional Frame-Sync Inputs (CMOS/TTL)
Continuous Input Clock Quality Monitoring
Numerous Input Clock Frequencies Supported:
SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
Ethernet xMII: 2.5, 25, 125, 156.25MHz
PDH: N x DS1, N x E1, N x DS2, DS3, E3
Frame Sync: 2kHz, 4kHz, 8kHz
The DS3102 register set is backward compatible with
Semtech’s ACS8522 timing card IC. The DS3102 has a
different package and pin arrangement than the
ACS8522.
Custom: Any Multiple of 2kHz Up to 131.072MHz,
Any Multiple of 8kHz Up to 155.52MHz
7 Output Clocks
Three CMOS/TTL Outputs (≤ 125MHz)
Two LVDS/LVPECL Outputs (≤ 312.50MHz)
Two Dual CMOS/TTL and LVDS/LVPECL Outputs
Five CMOS Outputs Have Additional Output Pins
That Can Be Powered at 2.5V or 3.3V
Numerous Output Clock Frequencies Supported:
SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
Ethernet xMII: 2.5, 25, 125, 156.25, 312.5MHz
PDH: N x DS1, N x E1, N x DS2, DS3, E3
Other: 10, 10.24, 13, 30.72MHz
Applications
SONET/SDH Equipment Clocks (SECs)
Synchronous Ethernet Equipment Clocks (EECs)
Timing Card IC in WAN Equipment Including MSPPs,
Ethernet Switches, Routers, DSLAMs, and
Wireless Base Stations
Ordering Information
TEMP RANGE
Frame Sync: 2kHz, 8kHz
Custom Clock Rates: Any Multiple of 2kHz Up to
77.76MHz, Any Multiple of 8kHz Up to
311.04MHz, Any Multiple of 10kHz Up to
388.79MHz
PART
PIN-PACKAGE
81 CSBGA (10mm)2
DS3102GN2
-40C to +85C
2 in suffix denotes a lead(Pb)-free/RoHS-compliant package.
General
Internal Compensation for Master Clock
Oscillator
SPI™ Processor Interface
1.8V Operation with 3.3V I/O (5V Tolerant)
Industrial Temperature Range
1