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DS3104-SE PDF预览

DS3104-SE

更新时间: 2024-11-25 03:30:35
品牌 Logo 应用领域
美信 - MAXIM 以太网时钟
页数 文件大小 规格书
135页 1009K
描述
Line Card Timing IC with Synchronous Ethernet Support

DS3104-SE 数据手册

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Rev: 072407  
DS3104-SE  
Line Card Timing IC with  
Synchronous Ethernet Support  
General Description  
Features  
Timing Card to Line Card Path  
The DS3104-SE is a low-cost, feature-rich timing IC for  
line cards with synchronous Gigabit Ethernet (GbE),  
10-Gigabit Ethernet (10GbE), and Fast Ethernet ports.  
ITU-T recommendation G.8261 (formerly G.pactiming)  
specifies that network synchronization can be carried  
over packet links by synchronizing the bit clock of the  
physical layer as is currently done on SONET/SDH  
links. The DS3104-SE enables synchronization in  
Ethernet line cards in both the transmit and receive  
directions.  
Two Input Clocks from Master and Slave Timing  
Cards (LVDS/LVPECL or CMOS/TTL)  
Optional Frame Sync Inputs and Outputs  
Continuous Input Clock Quality Monitoring  
Hitless Reference Switching, Automatic or Manual  
Holdover on Loss of All Inputs  
Programmable PLL Bandwidth, 0.1Hz to 400Hz  
Frequency Conversion Between SONET/SDH  
Rates and Ethernet MII/GMII/XGMII Rates  
Up to 7 Output Clocks: 3 CMOS/TTL (125MHz),  
2 LVDS/LVPECL (312.50MHz), and 2 Dual  
CMOS/TTL and LVDS/LVPECL  
In the transmit direction, the device accepts traditional  
SONET/SDH system clocks such as 19.44MHz from  
redundant system timing cards and synthesizes  
frequency-locked xMII clock rates, such as the 125MHz  
GTX_CLK for GbE GMIIs. Each Ethernet PHY then  
synthesizes a transmit bit clock that is frequency-locked  
to the xMII clock, and thus to the system clock and  
network clock. In the receive direction, each PHY  
divides down the recovered bit clock to produce the  
receive xMII clock. The DS3104-SE accepts the xMII  
clock from any of several Ethernet ports and forwards a  
frequency-locked system clock, such as 19.44MHz, to  
the system timing cards. SONET/SDH ports are also  
supported.  
Line Card to Timing Card Path  
Up to 8 Input Clocks: 4 CMOS/TTL (125MHz)  
and 4 LVDS/LVPECL/CMOS/TTL (156.25MHz)  
Hitless Reference Switching, Automatic or Manual  
Frequency Conversion Between Ethernet  
MII/GMII/XGMII and SONET/SDH Rates  
Two Output Clocks to Master and Slave Timing  
Cards (CMOS/TTL or LVDS/LVPECL)  
General  
Suitable Line Card IC for Stratum 3/3E/4, SMC,  
SEC  
Numerous Input Clock Frequencies Supported  
Ethernet xMII: 2.5, 25, 125, 156.25MHz  
SONET/SDH: 6.48, N x 19.44, N x 51.84MHz  
PDH: N x DS1, N x E1, N x DS2, DS3, E3  
Frame Sync: 2kHz, 4kHz, 8kHz  
Applications  
Line Cards with Any Mix of Synchronous Ethernet and  
SONET/SDH Ports in WAN Equipment Including  
MSPPs, Ethernet Switches, Routers, DSLAMs, and  
Wireless Base Stations  
Custom: Any Multiple of 2kHz Up to 131.072MHz,  
Any Multiple of 8kHz Up to 155.52MHz  
Numerous Output Clock Frequencies  
Supported  
Ethernet xMII: 2.5, 25, 125, 156.25, 312.5MHz  
SONET/SDH: 6.48, N x 19.44, N x 51.84MHz  
PDH: N x DS1, N x E1, N x DS2, DS3, E3  
Other: 10, 10.24, 13, 30.72MHz  
Ordering Information  
PART  
DS3104GN  
DS3104GN+  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
81 CSBGA (10mm)2  
81 CSBGA (10mm)2  
Frame Sync: 2kHz, 8kHz  
Custom Clock Rates: Any Multiple of 2kHz Up to  
77.76MHz, Any Multiple of 8kHz Up to  
311.04MHz  
+Denotes a lead-free/RoHS-compliant package.  
Internal Compensation for Master Clock  
Oscillator  
SPI™ Processor Interface  
1.8V Operation with 2.5V/3.3V I/O (5V Tolerant)  
________________________________________________________ Maxim Integrated Products  
1
Some revisions of this device may incorporate deviations from published specifications known as errata.  
Multiple revisions of any device may be simultaneously available through various sales channels. For  
information about device errata, go to: www.maxim-ic.com/errata. For pricing, delivery, and ordering  
information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
 

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