Datasheet > DS2476

DS2476

更新时间： 2023-12-20 18:46:04

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
10页	339K
描述
DeepCover安全协处理器

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数据手册

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DS2476 数据手册

ABRIDGED DATA SHEET

DS2476

DeepCover Secure Coprocessor

device must have a slave address that does not conflict

with other devices on the bus.

I C

General Characteristics

The I C bus uses a data line (SDA) plus a clock signal

Data transfers can be initiated only when the bus is not

busy. The master generates the serial clock (SCL), con-

trols the bus access, generates the START and STOP

conditions, and determines the number of data bytes

transferred between START and STOP (Figure 42). Data

is transferred in bytes with the most significant bit being

transmitted first. After each byte follows an acknowledge

bit to allow synchronization between master and slave.

(SCL) for communication. Both SDA and SCL are bidi-

rectional lines, connected to a positive supply voltage

through a pullup resistor. When there is no communica-

tion, both lines are high. The output stages of devices

connected to the bus must have an open drain or open

collector to perform the wired-AND function. Data on the

I C bus can be transferred at rates of up to 100kbps in

standard mode and up to 400kbps in fast mode. The

DS2476 works in both modes.

Slave Address

The slave address to which the DS2476 responds is

shown in Figure 43. The slave address is part of the slave

address/control byte. The last bit of the slave address/

control byte (R/W) defines the data direction. When set

to 0, subsequent data flows from master to slave (write

access); when set to 1, data flows from slave to master

(read access).

A device that sends data on the bus is defined as a

transmitter, and a device receiving data is defined as a

receiver. The device that controls the communication is

called a master. The devices that are controlled by the

master are slaves. To be individually accessed, each

MSB FIRST

MSB

LSB

MSB

LSB

SDA

ACK/

NACK

ACK

SLAVE

ADDRESS

DATA

R/W

ACK

SCL

1–7

IDLE

START

CONDITION

STOP CONDITION

REPEATED START

REPEATED IF MORE

BYTES ARE

TRANSFERRED

Figure 42. I C Protocol Overview

7-BIT SLAVE ADDRESS

R/W

MSB

DETERMINES

READ OR WRITE

Figure 43. DS2476 I C Slave Address

Maxim Integrated

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