Datasheet > DS2476

DS2476

更新时间： 2023-12-20 18:46:04

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
10页	339K
描述
DeepCover安全协处理器

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中文翻译

获取价格

数据手册

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DS2476 数据手册

ABRIDGED DATA SHEET

DS2476

DeepCover Secure Coprocessor

slave that is ready to communicate acknowledges at least

its slave address. However, some time later, the slave

might refuse to accept data, possibly because of an invalid

command code or unexpected data. In this case, the slave

device does not acknowledge any of the bytes that it

refuses and leaves SDA high. In either case, after a slave

has failed to acknowledge, the master first should generate

a repeated START condition or a STOP condition followed

by a START condition to begin a new data transfer.

Acknowledged by Slave

A slave device, when addressed, is usually obliged to

generate an acknowledge after the receipt of each byte.

The master must generate the clock pulse for each

acknowledge bit. A slave that acknowledges must pull

down the SDA line during the acknowledge clock pulse

so that it remains stable low during the high period of this

clock pulse. Setup and hold times t

must be taken into account.

and t

SU:DAT

HD:DAT

Not Acknowledged by Master

Acknowledged by Master

At some time when receiving data, the master must signal

an end of data to the slave. To achieve this, the master

does not acknowledge the last byte that it has received

from the slave. In response, the slave releases SDA,

allowing the master to generate the STOP condition.

To continue reading from a slave, the master is obliged

to generate an acknowledge after the receipt of each

byte. The master must generate the clock pulse for each

acknowledge bit. A master that acknowledges must pull

down the SDA line during the acknowledge clock pulse

so that it remains stable low during the high period of this

Read and Write

clock pulse. Setup and hold times t

before the ris-

SU:DAT

To write to the DS2476, the master must access the

device in write access mode, i.e., the slave address must

be sent with the direction bit set to 0. The next byte to be

sent in write access mode is command byte. To read from

the DS2476, the master must access the device in read

access mode, i.e., the slave address must be sent with

the direction bit set to 1. The read address is determined

either from a preceding write access or implied from a

function command.

ing edge of SCL and t

after the falling edge of SCL

HD:DAT

must be taken into account.

Not Acknowledged by Slave

A slave device may be unable to receive or transmit data,

for example, because it is busy performing a real-time func-

tion such as MAC computation or EEPROM write cycle or

is in sleep mode. In this case, the slave does not acknowl-

edge its slave address and leaves the SDA line high. A

Maxim Integrated

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中文翻译

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与DS2476相关器件

型号	品牌	获取价格	描述	数据表
DS2477	ADI	获取价格	具有ChipDNA PUF保护的DeepCover安全SHA-3协处理器
DS2478	ADI	获取价格	DeepCover汽车安全协处理器
DS2480	DALLAS	获取价格	Serial 1.Wire Line Driver
DS2480B	MAXIM	获取价格	Serial to 1-Wire Line Driver
DS2480B	DALLAS	获取价格	Serial 1-Wire Line Driver with Load Sensor
DS2480B	ADI	获取价格	串行、1-Wire线驱动器
DS2480B/T&R	MAXIM	获取价格	Line Driver, 1 Func, 1 Driver, PDSO8, 0.150 INCH, SOP-8
DS2480B+	MAXIM	获取价格	Serial to 1-Wire Line Driver
DS2480B+R	MAXIM	获取价格	Serial to 1-Wire Line Driver
DS2480B+T	MAXIM	获取价格	Serial to 1-Wire Line Driver

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