ABRIDGED DATA SHEET
DS2465
DeepCover Secure Authenticator with
SHA-256 Coprocessor and 1-Wire Master Function
2
I C Communication Examples (continued)
Refer to the full data sheet for this information.
1-Wire Master Reset, e.g., After Power-Up
S
AD,0
A
60h
A
1WMR
A
Sr AD,0
A
60h
A
1WRS
A
P
The 1-Wire Master Reset must be followed by a 1-Wire Reset Pulse command.
1-Wire Reset Pulse, e.g., to Begin or End 1-Wire Communication
Case A: 1-Wire Idle (1WB = 0), No Busy Polling to Read the Result
S
AD,0
A
60h
A
1WRS
A
P
(Idle)
S AD,1 A <byte> A\ P
In the first cycle, the master sends the command; then the master waits (Idle) for the 1-Wire Reset to complete.
In the second cycle the DS2465 is accessed to read the result of the 1-Wire Reset from the 1-Wire Master Status
register.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed, then Read the Result
S
AD,0
A
60h
A
1WRS
A Sr AD,1 A <byte> A <byte> A\ P
Repeat until the 1WB bit has changed to 0.
Case C: 1-Wire Busy (1WB = 1)
S
AD,0
A
60h
A
1WRS A\
P
The master should stop and restart as soon as the DS2465 does not acknowledge the command code.
1-Wire Single Bit, e.g., to Generate a Single Time Slot on the 1-Wire Line
Case A: 1-Wire Idle (1WB = 0), No Busy Polling
S
AD,0
A
60h
A
1WSB
A
<byte>
A
P
(Idle)
S
AD,1 A <byte> A\ P
The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the result
from the 1-Wire single-bit command.
Maxim Integrated
39