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DS2176QN/T&R PDF预览

DS2176QN/T&R

更新时间: 2024-10-28 14:21:31
品牌 Logo 应用领域
美信 - MAXIM PC电信电信集成电路
页数 文件大小 规格书
15页 305K
描述
Elastic Buffer, CMOS, PQCC28, PLASTIC, LCC-28

DS2176QN/T&R 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QLCC
包装说明:PLASTIC, LCC-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
运营商类型:CEPT PCM-30/E-1运营商类型(2):T-1(DS1)
数据速率:2048 MbpsJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.505 mm
湿度敏感等级:1功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):245电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Digital Transmission Interfaces最大压摆率:0.01 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:ELASTIC BUFFER
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:11.505 mmBase Number Matches:1

DS2176QN/T&R 数据手册

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DS2176  
T1 Receive Buffer  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
§ Synchronizes loop–timed and system–timed  
T1 data streams  
VDD  
SIGH  
RMSYN  
RCLK  
1
24  
23  
SCKLSEL  
SYCLK  
SSER  
§ Two–frame buffer depth; slips occur on frame  
boundaries  
2
3
4
22  
21  
RSER  
§ Output indicates when slip occurs  
§ Buffer may be recentered externally  
§ Ideal for 1.544 to 2.048 MHz rate conversion  
§ Interfaces to parallel or serial backplanes  
§ Extracts and buffers robbed–bit signaling  
§ Inhibits signaling updates during alarm or slip  
conditions  
A
B
SLIP  
5
6
20  
19  
SBIT8  
SMSYNC  
SIGFRZ  
SFSYNC  
ALN  
C
D
7
8
18  
17  
SCHCLK  
SM0  
9
10  
16  
15  
FMS  
SM1  
11  
12  
14  
13  
VSS  
S/P  
§ Integration feature “debounces” signaling  
§ Slip–compensated output indicates when  
signaling updates occur  
24-PIN 300 MIL DIP  
§ Compatible with DS2180A T1 Transceiver  
§ Surface mount package available, designated  
DS2176Q  
§
Industrial temperature range of –40°C to  
+85°C available, designated DS2176N  
4
3
2
1
28 27 26  
5
6
7
8
9
25  
A
B
SSER  
SLIP  
SBIT8  
NC  
NC  
SMSYNC  
SIGFRZ  
24  
23  
NC  
22  
21  
20  
19  
NC  
C
D
10  
11  
SCHCLK  
12 13 14 15 16 17 18  
28-PIN PLCC  
DESCRIPTION  
The DS2176 is a low–power CMOS device specifically designed for synchronizing receive side loop–  
timed T–carrier data streams with system side timing. The device has several flexible operating modes  
which simplify interfacing incoming data to parallel and serial TDM backplanes. The device extracts,  
buffers and integrates ABCD signaling; signaling updates are prohibited during alarm or slip conditions.  
The buffer replaces extensive hardware in existing applications with one “skinny” 24–lead package.  
Application areas include digital trunks, drop and insert equipment, transcoders, digital cross–connects  
(DACS), private network equipment and PABX–to–computer interfaces such as DMI and CPI.  
1 of 15  
091599  

DS2176QN/T&R 替代型号

型号 品牌 替代类型 描述 数据表
DS2176Q MAXIM

完全替代

Elastic Buffer, CMOS, PQCC28, PLASTIC, LCC-28

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