Datasheet > DS2174QN/TR+

DS2174QN/TR+

更新时间： 2024-01-08 16:28:20

品牌	Logo	应用领域
美信 - MAXIM		电信电信集成电路
页数	文件大小	规格书
24页	261K
描述
Telecom Circuit, PQCC44,

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技术参数
数据手册

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DS2174QN/TR+ 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	QCCJ, LDCC44,.7SQ	Reach Compliance Code：	compliant
风险等级：	5.84	JESD-30 代码：	S-PQCC-J44
JESD-609代码：	e3	端子数量：	44
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC44,.7SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
最大压摆率：	60 mA	标称供电电压：	3.3 V
表面贴装：	YES	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	Base Number Matches：	1

DS2174QN/TR+ 数据手册

DS2174

1. GENERAL OPERATION

1.1 Pattern Generation

1.1.1 Polynomial Generation

The DS2174 has a tap select register that can be used as a mask to tap up to 32 bits in the feedback path

of the polynomial generator. It also features a seed register that can be used to preload the polynomial

generator with a seed value. This is done on the rising edge of TL in Control Register 1.

The DS2174 generates polynomial patterns of any length up to and including 2³²- 1. All of the industry-

standard polynomials can be programmed using the control registers. The polynomial is generated using a

shift register of programmable length and programmable feedback tap positions. The user has access to

all combinations of pattern length and pattern tap location to generate industry-standard polynomials or

other combinations as well. In addition, the QRSS pattern described in T1.403 is described by the

polynomial 2²⁰– 1. This pattern has the additional requirement that “an output bit is forced to a 1

whenever the next 14 bits are 0.” Setting the QRSS bit in Control Register 1 causes the pattern generator

to enforce this rule.

1.1.2 Repetitive Pattern Generation

In addition to polynomial patterns, the DS2174 generates repetitive patterns of considerable length. The

programmer has access to 512 bytes of memory for storing pattern. The pattern length bits PL0 through

PL8, located at addresses 02h and 03h, are used to program the length of the repetitive pattern. Memory is

addressed indirectly and is used to store the pattern. Data can be sent MSB or LSB first as it appears in

the memory.

Repetitive patterns can include simple patterns such as 3 in 24, but the additional memory can be used to

store patterns such as DDS-n patterns or T1-n patterns. Repetitive patterns are stored in increments of 8

bits. To generate a repetitive pattern that is 12 bits long (3 nibbles), the pattern is written twice such that

the pattern is 24 bits long (3 bytes), and repeats twice in memory. The same is true when the device is

used in serial mode: a 5-bit pattern is written to memory 5 times. For example,

To generate a 00001 pattern at the serial output, write these bytes to memory:

RAM ADDRESS BINARY CODE HEX CODE

00h

01h

02h

03h

04h

00010000

01000010

00001000

00100001

10000100

10h

42h

08h

21h

84h

4 of 24

1 2 345 6 7...24

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与DS2174QN/TR+相关器件

型号	品牌	描述	获取价格	数据表
DS2174QN+	MAXIM	暂无描述	获取价格
DS2174QN+T&R	MAXIM	Telecom Circuit, 1-Func, PQCC44, PLASTIC, LCC-44	获取价格
DS2175	DALLAS	T1/CEPT Elastic Store	获取价格
DS2175+	MAXIM	Elastic Buffer, CMOS, PDIP16, 0.300 INCH, DIP-16	获取价格
DS2175N	DALLAS	T1/CEPT Elastic Store	获取价格
DS2175S	ETC	PCM， Other/Special/Miscellaneous	获取价格

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