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DS1721

更新时间: 2023-12-20 18:45:51
品牌 Logo 应用领域
亚德诺 - ADI 监控
页数 文件大小 规格书
17页 257K
描述
数字温度计和温度监控器

DS1721 数据手册

 浏览型号DS1721的Datasheet PDF文件第5页浏览型号DS1721的Datasheet PDF文件第6页浏览型号DS1721的Datasheet PDF文件第7页浏览型号DS1721的Datasheet PDF文件第9页浏览型号DS1721的Datasheet PDF文件第10页浏览型号DS1721的Datasheet PDF文件第11页 
DS1721  
DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 5  
Figure 6 details how data transfer is accomplished on the two-wire bus. Depending upon the state of the  
R/ W bit, two types of data transfer are possible:  
Data transfer from a master transmitter to a slave receiver. The 1st byte transmitted by the master is  
the slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each  
received byte.  
Data transfer from a slave transmitter to a master receiver. The 1st byte (the slave address) is  
transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of data  
bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received  
bytes other than the last byte. At the end of the last received byte, a ‘not acknowledge’ is returned.  
The master device generates all of the serial clock pulses and the START and STOP conditions. A  
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START  
condition is also the beginning of the next serial transfer, the bus will not be released.  
The DS1721 may operate in the following two modes:  
Slave receiver mode: Serial data and clock are received through SDA and SCL. After each byte is  
received, an acknowledge bit is transmitted. START and STOP conditions are recognized as the  
beginning and end of a serial transfer. Address recognition is performed by hardware after reception of  
the slave address and direction bit.  
Slave transmitter mode: The first byte is received and handled as in the slave receiver mode. However,  
in this mode, the direction bit will indicate that the transfer direction is reversed. Serial data is transmitted  
on SDA by the DS1721 while the serial clock is input on SCL. START and STOP conditions are  
recognized as the beginning and end of a serial transfer.  
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