Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
Units
Supply voltage (V
)
CC
4.5
5.5
V
Temperature (T )
A
b
a
125
Supply Voltage
7.0V
7.0V
1.5V
DS1628
DS3628
55
C
§
§
a
0
70
C
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Storage Temperature Range
b
b
a
65 C to 150 C
§
§
Maximum Power Dissipation* at 25 C
Cavity Package
Molded Package
§
1667 mW
1832 mW
Lead Temperature (Soldering, 10 seconds)
300 C
§
*Derate cavity package 11.1 mW/ C above 25 C; derate molded package
§
§
14.7 mW/ C above 25 C.
§
§
Electrical Characteristics (Notes 2, 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Input Clamp Voltage
2.0
V
V
IN(1)
IN(0)
IN(1)
IN(0)
0.8
40
e
e
e
e
e
e
I
I
V
V
V
V
5.5V
5.5V
4.5V
4.5V, I
V
V
5.5V
5.5V
0.1
mA
mA
V
CC
CC
CC
CC
IN
b
b
400
180
IN
e b
e b
b
0.7
4.3
b
1.2
V
I
IN
18 mA
CLAMP
OH
V
Logical ‘‘1’’ Output Voltage
(No Load)
10 mA
DS1628
DS3628
DS1628
DS3628
DS1628
DS3628
3.4
3.5
V
OH
OL
OH
OL
4.3
0.25
0.25
3.9
V
e
e
e
e
10 mA
V
OL
V
OH
V
OL
Logical ‘‘0’’ Output Voltage
(No Load)
V
CC
V
CC
V
CC
4.5V, I
4.5V, I
4.5V, I
0.4
V
0.35
V
e b
Logical ‘‘1’’ Output Voltage
(With Load)
1.0 mA
2.5
2.7
V
3.9
V
e
Logical ‘‘0’’ Output Voltage
(With Load)
20 mA
DS1628/DS3628
0.35
0.5
V
e
e
e
e
b
I
I
Logical ‘‘1’’ Drive Current
Logical ‘‘0’’ Drive Current
TRI-STATE Output Current
Power Supply Current
V
V
V
V
4.5V, V
4.5V, V
0V, (Note 6)
150
mA
mA
mA
ID
OD
CC
OUT
4.5V, (Note 6)
150
CC
OUT
e
e
b
40
Hi-Z
0.4V to 2.4V, DIS1 or DIS2
2.0V
0.1
90
40
OUT
e
CC
e
3.0V
e
I
5.5V One DIS Input
All Other Inputs
CC
120
mA
X, Outputs at Hi-Z
e
e
3V
DIS1, DIS2
Outputs on
0V, Others
70
25
100
50
mA
mA
e
All Inputs
0V, Outputs Off
e
e
Switching Characteristics (V
5V, T
25 C) (Note 6)
§
CC
A
Symbol
Parameter
Conditions
Min
Typ
Max
Units
e
e
e
e
e
e
e
e
e
t
t
t
t
Storage Delay Negative Edge
(Figure 1)
(Figure 1)
(Figure 1)
(Figure 1)
C
C
C
C
C
C
C
C
50 pF
4.0
6.5
4.2
6.5
4.2
19
5.0
8.0
5.0
8.0
6.0
22
ab
S
S
F
L
L
L
L
L
L
L
L
ns
500 pF
50 pF
Storage Delay Positive Edge
Fall Time
ba
ns
ns
ns
500 pF
50 pF
500 pF
50 pF
Rise Time
5.2
20
7.0
24
R
500 pF
2 kX to V
e
to GND
t
t
Delay from Disable Input to Logical ‘‘0’’
Level (from High Impedance State)
C
L
50 pF
R
L
ZL
CC
19
13
25
20
ns
ns
(Figure 2)
e
to GND
e
R 2 kX to GND
L
(Figure 2)
Delay from Disable Input to Logical ‘‘1’’
Level (from High Impedance State)
C
L
50 pF
ZH
2