Datasheet > DNC3X3625

DNC3X3625

更新时间： 2024-11-24 22:12:47

品牌	Logo	应用领域
杰尔 - AGERE		以太网局域网（LAN）标准
页数	文件大小	规格书
32页	435K
描述
Hex 10/100 Mbits/s Ethernet Transceiver Macrocell

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DNC3X3625 数据手册

Advance Data Sheet

March 2000

DNC3X3625

Hex 10/100 Mbits/s Ethernet Transceiver Macrocell

Hex 100 Mbits/s FX Transceiver

Features

■ Compatible with IEEE 802.3u 100Base-FX stan-

dard.

Hex 10 Mbits/s Transceiver

■ DSP based.

■ Reuses existing twisted-pair I/O pins for compatible

fiber-optic transceiver pseudo-ECL (PECL) data.

■ Compatible with IEEE * 802.3 10Base-T standard

for twisted-pair cable.

■ Fiber mode automatically configures port:

— FX mode enable is pin or register selectable

— Disables autonegotiation and 10Base-T.

— Enables 100Base-FX remote fault signaling.

— Disables MLT-3 encoder/decoder.

■ Half- and full-duplex operations.

■ Autopolarity detection and correction.

■ Adjustable squelch level for extended wire-length

capability (two levels).

— Disables scrambler/descrambler.

General

■ Interfaces with IEEE 802.3u media independent

interface (MII) or a serial 10 Mbits/s 7-pin interface.

■ Ports individually configurable

■ On-chip filtering eliminates the need for external fil-

■ Autonegotiation and management:

— Fast link pulse (FLP) burst generator.

— Arbitration function.

ters.

— Accepts preamble suppression.

— Operates up to 12.5 MHz.

Hex 100 Mbits/s Transceiver

■ Compatible with IEEE 802.3u MII (clause 22),

PCS/PMA (clause 24), PMD (clause 25), MII man-

agement, and autonegotiation (clause 28) specifi-

cations.

■ Supports the MII station management protocol and

frame format (clause 22): basic and extended reg-

ister set.

■ Supports next page.

■ Selectable 5-bit code-group (PDT/PDR interface)

■ Provides status signals: receive activity, transmit

activity, full duplex, collision/jabber, link integrity,

and speed indication.

or 4-bit data nibbles (MII interface) input/output.

■ Full- or half-duplex operations.

■ Optional carrier integrity monitor (CIM).

■ Powerdown mode for 10 Mbits/s and 100 Mbits/s

operation.

■ Selectable carrier sense signal generation (MCRS)

asserted during either transmission or reception in

half duplex (MCRS asserted during reception only

in full duplex).

■ Loopback testing for 10 Mbits/s and 100 Mbits/s

operation.

■ 0.25 µm low-power CMOS technology.

■ Single 3.3 V power supply operation.

■ Adaptive equalization and baseline wander correc-

tion.

■ 25 MHz XTAL oscillator input or 25 MHz/50 MHz/

■ On-chip filtering eliminates the need for external

125 MHz clock input.

filters.

* IEEE is a registered trademark of The Institute of Electrical and

Electronics Engineers, Inc.

■ Compatible with RMII (standard version) and SMII

(standard version).

Note: Advisories are issued as needed to update product information. When using this data sheet for design purposes, please contact

your Lucent Technologies Microelectronics Group Account Manager to obtain the latest advisory on this product.

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