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DMN66D0LDW PDF预览

DMN66D0LDW

更新时间: 2024-11-14 09:54:15
品牌 Logo 应用领域
美台 - DIODES 晶体晶体管场效应晶体管
页数 文件大小 规格书
4页 176K
描述
DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

DMN66D0LDW 数据手册

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DMN66D0LDW  
DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR  
Please click here to visit our online spice models database.  
Features  
Mechanical Data  
Dual N-Channel MOSFET  
Low On-Resistance  
Low Gate Threshold Voltage  
Low Input Capacitance  
Fast Switching Speed  
Small Surface Mount Package  
ESD Protected Gate, 1KV (HBM)  
Lead Free/RoHS Compliant (Note 2)  
Qualified to AEC-Q101 Standards for High Reliability  
Case: SOT-363  
Case Material: Molded Plastic. UL Flammability Classification  
Rating 94V-0  
Moisture Sensitivity: Level 1 per J-STD-020C  
Terminals: Solderable per MIL-STD-202, Method 208  
Lead Free Plating (Matte Tin Finish annealed over Alloy 42  
leadframe).  
Terminal Connections: See Diagram  
Marking Information: See Page 3  
Ordering Information: See Page 3  
Weight: 0.006 grams (approximate)  
SOT-363  
D2  
G1  
S1  
S2  
G2  
D1  
ESD PROTECTED, 1KV  
TOP VIEW  
TOP VIEW  
Internal Schematic  
Maximum Ratings @TA = 25°C unless otherwise specified  
Characteristic  
Symbol  
VDSS  
Value  
60  
Units  
V
V
Drain-Source Voltage  
Gate-Source Voltage (Note 1)  
Drain Current (Note 1)  
Continuous  
±20  
115  
73  
VGSS  
Continuous  
Continuous @ 100°C  
Pulsed  
mA  
ID  
800  
Thermal Characteristics @TA = 25°C unless otherwise specified  
Characteristic  
Symbol  
PD  
Rθ  
Value  
250  
1.6  
Units  
mW  
mW/°C  
Total Power Dissipation  
Derating above TA = 25°C (Note 1)  
Thermal Resistance, Junction to Ambient  
Operating and Storage Temperature Range  
500  
°C/W  
°C  
JA  
Tj, TSTG  
-55 to +150  
Electrical Characteristics @TA = 25°C unless otherwise specified  
Characteristic  
OFF CHARACTERISTICS (Note 3)  
Symbol  
Min  
Typ Max Unit  
Test Condition  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
60  
70  
V
BVDSS  
IDSS  
1.0  
500  
V
GS = 0V, ID = 10μA  
@ TC  
@ TC = 125°C  
= 25°C  
µA  
VDS = 60V, VGS = 0V  
Gate-Body Leakage  
±5  
IGSS  
μA VGS = ±20V, VDS = 0V  
ON CHARACTERISTICS (Note 3)  
Gate Threshold Voltage  
1.2  
2.0  
V
Ω
VGS(th)  
RDS (ON)  
gFS  
3.5  
3.0  
VDS = VGS, ID = 250μA  
VGS = 5.0V, ID = 0.115A  
VGS = 10V, ID = 0.115A  
Static Drain-Source On-Resistance  
@ Tj = 25°C  
@ Tj = 125°C  
6
5
Forward Transconductance  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
80  
mS  
V
DS = 10V, ID = 0.115A  
23  
3.4  
1.4  
pF  
pF  
pF  
Ciss  
Coss  
Crss  
Output Capacitance  
V
DS = 25V, VGS = 0V, f = 1.0MHz  
Reverse Transfer Capacitance  
SWITCHING CHARACTERISTICS  
Turn-On Delay Time  
10  
33  
ns  
tD(ON)  
tD(OFF)  
VDD = 30V, ID = 0.115A, RL = 150Ω,  
Turn-Off Delay Time  
ns VGEN = 10V, RGEN = 25Ω  
Notes:  
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which  
can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.  
2. No purposefully added lead.  
3. Short duration pulse test used to minimize self-heating effect.  
1 of 4  
www.diodes.com  
February 2008  
© Diodes Incorporated  
DMN66D0LDW  
Document number: DS31232 Rev. 4 - 2  

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