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DM74S158 PDF预览

DM74S158

更新时间: 2024-11-25 22:54:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
5页 56K
描述
Quad 1 of 2 Line Data Selector/Multiplexer

DM74S158 数据手册

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August 1986  
Revised April 2000  
DM74S157 DM74S158  
Quad 1 of 2 Line Data Selector/Multiplexer  
General Description  
Applications  
These data selectors/multiplexers contain inverters and  
drivers to supply full on-chip data selection to the four out-  
put gates. A separate strobe input is provided. A 4-bit word  
is selected from one of two sources and is routed to the  
four outputs. The DM74S157 presents true data whereas  
the DM74S158 presents inverted data to minimize propa-  
gation delay time.  
Expand any data input point  
Multiplex dual data buses  
Generate four functions of two variables (one variable is  
common)  
Source programmable counters  
Features  
Buffered inputs and outputs  
Typical propagation time  
DM74S157 5 ns  
DM74S158 4 ns  
Typical power dissipation  
DM74S157 250 mW  
DM74S158 195 mW  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74S157N  
DM74S158N  
N16E  
N16E  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Connection Diagrams  
DM74S157  
DM74S158  
© 2000 Fairchild Semiconductor Corporation  
DS006470  
www.fairchildsemi.com  

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