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DM74LS47MX PDF预览

DM74LS47MX

更新时间: 2024-11-27 23:47:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 70K
描述
Decoder/Driver

DM74LS47MX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.4Is Samacsys:N
系列:LS输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm逻辑集成电路类型:SEVEN SEGMENT DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
输出特性:OPEN-COLLECTOR输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):100 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

DM74LS47MX 数据手册

 浏览型号DM74LS47MX的Datasheet PDF文件第2页浏览型号DM74LS47MX的Datasheet PDF文件第3页浏览型号DM74LS47MX的Datasheet PDF文件第4页浏览型号DM74LS47MX的Datasheet PDF文件第5页浏览型号DM74LS47MX的Datasheet PDF文件第6页 
October 1988  
Revised March 2000  
DM74LS47  
BCD to 7-Segment Decoder/Driver with  
Open-Collector Outputs  
General Description  
Features  
Open-collector outputs  
The DM74LS47 accepts four lines of BCD (8421) input  
data, generates their complements internally and decodes  
the data with seven AND/OR gates having open-collector  
outputs to drive indicator segments directly. Each segment  
output is guaranteed to sink 24 mA in the ON (LOW) state  
and withstand 15V in the OFF (HIGH) state with a maxi-  
mum leakage current of 250 µA. Auxiliary inputs provided  
blanking, lamp test and cascadable zero-suppression func-  
tions.  
Drive indicator segments directly  
Cascadable zero-suppression capability  
Lamp test input  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS47M  
DM74LS47N  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
V
= Pin 16  
CC  
GND = Pin 8  
Pin Descriptions  
Pin Names  
Description  
A0–A3  
RBI  
BCD Inputs  
Ripple Blanking Input (Active LOW)  
Lamp Test Input (Active LOW)  
LT  
BI/RBO  
Blanking Input (Active LOW) or  
Ripple Blanking Output (Active LOW)  
Segment Outputs (Active LOW) (Note 1)  
a –g  
Note 1: OC—Open Collector  
© 2000 Fairchild Semiconductor Corporation  
DS009817  
www.fairchildsemi.com  

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