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DM74LS450J PDF预览

DM74LS450J

更新时间: 2024-11-06 21:54:19
品牌 Logo 应用领域
美国国家半导体 - NSC 复用器逻辑集成电路
页数 文件大小 规格书
6页 130K
描述
16:1 Multiplexer

DM74LS450J 数据手册

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PRELIMINARY  
July 1989  
DM54LS450/DM74LS450 16:1 Multiplexer  
General Description  
Features/Benefits  
Y
24-pin SKINNYDIP saves space  
The 16:1 Mux selects one of sixteen inputs, E0 through E15,  
specified by four binary select inputs, A, B, C, and D. The  
true data is output on Y and the inverted data on W. Propa-  
gation delays are the same for both inputs and addresses  
and are specified for 50 pF loading. Outputs conform to the  
standard 8 mA LS totem pole drive standard.  
Y
Similar to 74150 (Fat DIP)  
Y
Low current PNP inputs reduce loading  
Connection Diagram  
Standard Test Load  
Top View  
TL/L/8338–2  
TL/L/8338–1  
Order Number DM54LS450J, DM74LS450J,  
DM74LS450N or DM74LS450V  
See NS Package Number J24F, N24C or V28A  
Function Table  
Input  
Output  
Select  
D
C
B
A
W
Y
L
L
L
L
L
L
L
H
L
E0  
E1  
E0  
E1  
L
L
H
H
L
E2  
E2  
L
L
H
L
E3  
E3  
L
H
H
H
H
L
E4  
E4  
L
L
H
L
E5  
E5  
L
H
H
L
E6  
E6  
L
H
L
E7  
E7  
H
H
H
H
H
H
H
H
E8  
E8  
L
L
H
L
E9  
E9  
L
H
H
L
E10  
E11  
E12  
E13  
E14  
E15  
E10  
E11  
E12  
E13  
E14  
E15  
L
H
L
H
H
H
H
L
H
L
H
H
H
C
1995 National Semiconductor Corporation  
TL/L/8338  
RRD-B30M115/Printed in U. S. A.  

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