DM74AS286

更新时间： 2024-09-30 22:56:51

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		总线驱动器
页数	文件大小	规格书
7页	67K
描述
9-Bit Parity Generator/Checker with Bus-Driver Parity I/O Port

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中文翻译

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数据手册

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DM74AS286 数据手册

October 1986

Revised April 2000

DM74AS286

9-Bit Parity Generator/Checker

with Bus-Driver Parity I/O Port

General Description

Features

■ PNP inputs to reduce bus loading

These universal, 9-bit parity generators/checkers utilize

advanced Schottky high performance circuitry and feature

odd/even outputs to facilitate operation of either odd or

even parity applications. The word length capability is eas-

ily expanded by cascading.

■ Generates either odd or even parity for nine data lines

■ Inputs are buffered to lower the drive requirements

■ Can be used to upgrade existing systems using MSI

parity circuits

The DM74AS286 can be used to upgrade the performance

of most systems utilizing the DM74AS280 parity generator/

checker. Although the DM74AS286 is implemented without

expander inputs, the corresponding function is provided by

the availability of an input pin XMIT. XMIT is a control line

which makes parity error output active and parity an input

port when HIGH; when LOW, parity error output is inactive

and parity becomes an output port. In addition, parity I/O

control circuitry contains a feature to keep the I/O port in

the 3-STATE during power UP or DOWN to prevent bus

glitches.

■ Cascadable for n-bits

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full

temperature and V_CCrange

■ A parity I/O portable to drive bus

Ordering Code:

Order Number Package Number

Package Description

DM74AS286M

DM74AS286N

M14A

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Number of Inputs

(A thru I)

Parity I/O

Parity

Error

Mode

XMIT

that are HIGH

0, 2, 4, 6, 8

1, 3, 5, 7, 9

0, 2, 4, 6, 8

1, 3, 5, 7, 9

Input Output

Operation

Parity

N/A

Generator

Parity

N/A

Checker

Parity

Checker

L = LOW Logic Level

H = HIGH Logic Level

N/A = Not Applicable

DS006305

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

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与DM74AS286相关器件

型号	品牌	获取价格	描述	数据表
DM74AS286J	ETC	获取价格	Parity Generator/Checker
DM74AS286J/A+	ETC	获取价格	Parity Generator/Checker
DM74AS286M	FAIRCHILD	获取价格	9-Bit Parity Generator/Checker with Bus-Driver Parity I/O Port
DM74AS286M_NL	FAIRCHILD	获取价格	Parity Generator/Checker, AS Series, 9-Bit, True Output, TTL, PDSO14, 0.150 INCH, LEAD FRE
DM74AS286MA+	TI	获取价格	AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-1
DM74AS286MA+X	TI	获取价格	AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-1
DM74AS286MX	FAIRCHILD	获取价格	Parity Generator/Checker
DM74AS286MX	TI	获取价格	AS SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, 0.150 INCH, PLASTIC, SOP-1
DM74AS286N	FAIRCHILD	获取价格	9-Bit Parity Generator/Checker with Bus-Driver Parity I/O Port
DM74AS286N/A+	ETC	获取价格	Parity Generator/Checker

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