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DM74ALS257N PDF预览

DM74ALS257N

更新时间: 2024-10-31 22:56:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解复用器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 77K
描述
3-STATE Quad 1-of-2-Line Data Selector/Multiplexer

DM74ALS257N 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, PLASTIC, MS-001, DIP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.41
Is Samacsys:N系列:ALS
JESD-30 代码:R-PDIP-T16长度:19.305 mm
逻辑集成电路类型:MULTIPLEXER最大I(ol):0.024 A
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):14 mA
Prop。Delay @ Nom-Sup:12 ns传播延迟(tpd):12 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

DM74ALS257N 数据手册

 浏览型号DM74ALS257N的Datasheet PDF文件第2页浏览型号DM74ALS257N的Datasheet PDF文件第3页浏览型号DM74ALS257N的Datasheet PDF文件第4页浏览型号DM74ALS257N的Datasheet PDF文件第5页浏览型号DM74ALS257N的Datasheet PDF文件第6页浏览型号DM74ALS257N的Datasheet PDF文件第7页 
April 1984  
Revised February 2000  
DM74ALS257 • DM74ALS258  
3-STATE Quad 1-of-2-Line Data Selector/Multiplexer  
General Description  
Features  
These data selectors/multiplexers contain inverters and  
drivers to supply full on-chip data selection to the four 3-  
STATE outputs that can interface directly with data lines of  
bus-organized systems. A 4-bit word selected from one of  
two sources is routed to the four outputs. The  
DM74ALS257 presents true data whereas the  
DM74ALS258 presents inverted data to minimize propaga-  
tion delay time.  
Switching specifications at 50 pF  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Functionally and pin for pin compatible with Schottky  
and low power Schottky TTL counterpart  
Improved AC performance over Schottky and low power  
Schottky counterparts  
This 3-STATE output feature means that n-bit (paralleled)  
data selectors with up to 258 sources can be implemented  
for data buses. It also permits the use of standard TTL reg-  
isters for data retention throughout the system.  
3-STATE buffer-type outputs drive bus lines directly  
Expand any data input point  
Multiplex dual data buses  
General four functions of two variables (one variable is  
common)  
Source programmable counters  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS257M  
DM74ALS257SJ  
DM74ALS257N  
DM74ALS258M  
DM74ALS258N  
M16A  
M16D  
N16E  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Inputs  
Output Y  
Output  
Select  
A
B
DM74ALS257 DM74ALS258  
Control  
H
L
L
L
L
X
L
X
L
X
X
X
L
Z
L
Z
H
L
L
H
X
X
H
L
H
H
H
L
H
H
H = HIGH Level  
L = LOW Level  
X = Don't Care  
Z = High Impedance (OFF)  
© 2000 Fairchild Semiconductor Corporation  
DS006227  
www.fairchildsemi.com  

DM74ALS257N 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS257AN TI

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