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DM74ALS137

更新时间： 2024-09-20 22:56:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解复用器锁存器
页数 文件大小 规格书
6页 60K
描述
3 to 8 Line Decoder/Demultiplexer with Address Latches

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中文翻译

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DM74ALS137 数据手册

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February 1991  
Revised February 2000  
DM74ALS137  
3 to 8 Line Decoder/Demultiplexer with Address Latches  
General Description  
Features  
■ Combines decoder and 3-bit address latch  
■ Incorporates 3 enable inputs to simplify cascading  
■ Low power dissipation: 28 mW typ  
The ALS137 is a three line to eight line decoder/demulti-  
plexer with latches on the three address inputs. When the  
latch-enable input (GL) is LOW, the ALS137 acts as a  
decoder/demultiplexer. When GL goes from LOW-to-HIGH,  
the address present at the select inputs (A, B, and C) is  
stored in the latches. Further address changes are ignored  
as long as GL remains HIGH. The output enable controls,  
G1 and G2, control the state of the outputs independently  
of the select or latch-enable inputs. All of the outputs are  
HIGH unless G1 is HIGH and G2 is LOW. The ALS137 is  
ideally suited for implementing glitch-free decoders in  
strobed (stored-address) applications in bus-oriented sys-  
tems.  
■ Switching specifications guaranteed over full tempera-  
ture and VCC range  
■ Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS137M  
DM74ALS137N  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Inputs  
Enable  
GL G1 G2  
Outputs  
Select  
C
X
X
L
B
X
X
L
A
X
X
L
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7  
X
X
L
L
L
L
L
L
L
L
H
X
L
H
X
L
L
L
L
L
L
L
L
L
H
H
L
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
X
H
H
H
H
L
H
L
H
H
H
H
H
X
H
H
H
X
H
Output corresponding to stored  
address, L; all others, H  
L = LOW State  
H = HIGH State  
X = Don't Care  
© 2000 Fairchild Semiconductor Corporation  
DS006202  
www.fairchildsemi.com  
123456

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DM74ALS137J NSC

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 		IC,DECODER/DEMUX,3-TO-8-LINE,ALS-TTL,DIP,16PIN,CERAMIC
DM74ALS137J/A+ NSC

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 		IC,DECODER/DEMUX,3-TO-8-LINE,ALS-TTL,DIP,16PIN,CERAMIC
DM74ALS137M FAIRCHILD

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 		3 to 8 Line Decoder/Demultiplexer with Address Latches
DM74ALS137M/A+ ETC

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 		3-To-8-Line Demultiplexer
DM74ALS137M/B+ NSC

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 		IC,DECODER/DEMUX,3-TO-8-LINE,ALS-TTL,SOP,16PIN,PLASTIC
DM74ALS137MX FAIRCHILD

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 		3-To-8-Line Demultiplexer
DM74ALS137N NSC

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 		ALS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDIP16, 0.300 INCH, PLASTIC, DIP-16
DM74ALS137N FAIRCHILD

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 		3 to 8 Line Decoder/Demultiplexer with Address Latches
DM74ALS137N/A+ ETC

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 		3-To-8-Line Demultiplexer
DM74ALS137N/B+ NSC

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 		IC,DECODER/DEMUX,3-TO-8-LINE,ALS-TTL,DIP,16PIN,PLASTIC

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