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DM74ALS137M PDF预览

DM74ALS137M

更新时间: 2024-09-20 22:56:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器驱动器解复用器锁存器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
6页 60K
描述
3 to 8 Line Decoder/Demultiplexer with Address Latches

DM74ALS137M 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.62Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:ALS
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):11 mAProp。Delay @ Nom-Sup:20 ns
传播延迟(tpd):20 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

DM74ALS137M 数据手册

 浏览型号DM74ALS137M的Datasheet PDF文件第2页浏览型号DM74ALS137M的Datasheet PDF文件第3页浏览型号DM74ALS137M的Datasheet PDF文件第4页浏览型号DM74ALS137M的Datasheet PDF文件第5页浏览型号DM74ALS137M的Datasheet PDF文件第6页 
February 1991  
Revised February 2000  
DM74ALS137  
3 to 8 Line Decoder/Demultiplexer with Address Latches  
General Description  
Features  
Combines decoder and 3-bit address latch  
Incorporates 3 enable inputs to simplify cascading  
Low power dissipation: 28 mW typ  
The ALS137 is a three line to eight line decoder/demulti-  
plexer with latches on the three address inputs. When the  
latch-enable input (GL) is LOW, the ALS137 acts as a  
decoder/demultiplexer. When GL goes from LOW-to-HIGH,  
the address present at the select inputs (A, B, and C) is  
stored in the latches. Further address changes are ignored  
as long as GL remains HIGH. The output enable controls,  
G1 and G2, control the state of the outputs independently  
of the select or latch-enable inputs. All of the outputs are  
HIGH unless G1 is HIGH and G2 is LOW. The ALS137 is  
ideally suited for implementing glitch-free decoders in  
strobed (stored-address) applications in bus-oriented sys-  
tems.  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS137M  
DM74ALS137N  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Inputs  
Enable  
GL G1 G2  
Outputs  
Select  
C
X
X
L
B
X
X
L
A
X
X
L
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7  
X
X
L
L
L
L
L
L
L
L
H
X
L
H
X
L
L
L
L
L
L
L
L
L
H
H
L
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
X
H
H
H
H
L
H
L
H
H
H
H
H
X
H
H
H
X
H
Output corresponding to stored  
address, L; all others, H  
L = LOW State  
H = HIGH State  
X = Don't Care  
© 2000 Fairchild Semiconductor Corporation  
DS006202  
www.fairchildsemi.com  

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