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DM54LS273 PDF预览

DM54LS273

更新时间: 2024-11-23 22:56:47
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 144K
描述
8-Bit Register with Clear

DM54LS273 数据手册

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April 1992  
DM54LS273/DM74LS273  
8-Bit Register with Clear  
General Description  
Features  
Y
Edge-triggered  
The ’LS273 is a high speed 8-bit register, consisting of eight  
D-type flip-flops with a common Clock and an asynchronous  
active LOW Master Reset. This device is supplied in a 20-  
pin package featuring 0.3 inch row spacing.  
Y
8-bit high speed register  
Y
Parallel in and out  
Y
Common clock and master reset  
Connection Diagram  
Dual-In-Line Package  
TL/F/9825–1  
Order Number DM54LS273E, DM54LS273J,  
DM54LS273W, DM74LS273M or DM74LS273N  
See NS Package Number E20A, J20A, M20B,  
N20A or W20A  
Pin Names  
Description  
CP  
Clock Pulse Input (Active Rising Edge)  
Data Inputs  
D0D7  
MR  
Asynchronous Master Reset Input  
(Active LOW)  
Q0Q7  
Flip-Flop Outputs  
C
1995 National Semiconductor Corporation  
TL/F/9825  
RRD-B30M115/Printed in U. S. A.  

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LS SERIES, OCTAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20
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DM54LS273W NSC

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8-Bit Register with Clear