5秒后页面跳转
DM54LS163AE PDF预览

DM54LS163AE

更新时间: 2024-11-19 22:34:47
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器
页数 文件大小 规格书
12页 213K
描述
Synchronous 4-Bit Binary Counters

DM54LS163AE 数据手册

 浏览型号DM54LS163AE的Datasheet PDF文件第2页浏览型号DM54LS163AE的Datasheet PDF文件第3页浏览型号DM54LS163AE的Datasheet PDF文件第4页浏览型号DM54LS163AE的Datasheet PDF文件第5页浏览型号DM54LS163AE的Datasheet PDF文件第6页浏览型号DM54LS163AE的Datasheet PDF文件第7页 
May 1992  
54LS161A/DM54LS161A/DM74LS161A,  
54LS163A/DM54LS163A/DM74LS163A  
Synchronous 4-Bit Binary Counters  
General Description  
These synchronous, presettable counters feature an inter-  
nal carry look-ahead for application in high-speed counting  
designs. The LS161A and LS163A are 4-bit binary counters.  
The carry output is decoded by means of a NOR gate, thus  
preventing spikes during the normal counting mode of oper-  
ation. Synchronous operation is provided by having all flip-  
flops clocked simultaneously so that the outputs change co-  
incident with each other when so instructed by the count-  
enable inputs and internal gating. This mode of operation  
eliminates the output counting spikes which are normally  
associated with asynchronous (ripple clock) counters. A  
buffered clock input triggers the four flip-flops on the rising  
(positive-going) edge of the clock input waveform.  
gating. Instrumental in accomplishing this function are two  
count-enable inputs and a ripple carry output.  
Both count-enable inputs (P and T) must be high to count,  
and input T is fed forward to enable the ripple carry output.  
The ripple carry output thus enabled will produce a high-lev-  
el output pulse with a duration approximately equal to the  
high-level portion of the Q output. This high-level overflow  
A
ripple carry pulse can be used to enable successive cascad-  
ed stages. High-to-low level transitions at the enable P or T  
inputs may occur, regardless of the logic level of the clock.  
These counters feature a fully independent clock circuit.  
Changes made to control inputs (enable P or T or load) that  
will modify the operating mode have no effect until clocking  
occurs. The function of the counter (whether enabled, dis-  
abled, loading, or counting) will be dictated solely by the  
conditions meeting the stable set-up and hold times.  
These counters are fully programmable; that is, the outputs  
may be preset to either level. As presetting is synchronous,  
setting up a low level at the load input disables the counter  
and causes the outputs to agree with the setup data after  
the next clock pulse, regardless of the levels of the enable  
input. The clear function for the LS161A is asynchronous;  
and a low level at the clear input sets all four of the flip-flop  
outputs low, regardless of the levels of clock, load, or en-  
able inputs. The clear function for the LS163A is synchro-  
nous; and a low level at the clear inputs sets all four of the  
flip-flop outputs low after the next clock pulse, regardless of  
the levels of the enable inputs. This synchronous clear al-  
lows the count length to be modified easily, as decoding the  
maximum count desired can be accomplished with one ex-  
ternal NAND gate. The gate output is connected to the clear  
input to synchronously clear the counter to all low outputs.  
Features  
Y
Synchronously programmable  
Y
Internal look-ahead for fast counting  
Y
Carry output for n-bit cascading  
Y
Synchronous counting  
Y
Load control line  
Y
Diode-clamped inputs  
Y
Typical propagation time, clock to Q output 14 ns  
Y
Typical clock frequency 32 MHz  
Y
Typical power dissipation 93 mW  
Y
Alternate  
Military/Aerospace  
device  
(54LS161,  
The carry look-ahead circuitry provides for cascading coun-  
ters for n-bit synchronous applications without additional  
54LS163) is available. Contact a National Semiconduc-  
tor Sales Office/Distributor for specificaitons.  
Connection Diagram  
Dual-In-Line Package  
Order Numbers 54LS161ADMQB, 54LS161AFMQB,  
54LS161ALMQB, 54LS163ADMQB, 54LS163AFMQB,  
54LS163ALMQB, DM54LS161AJ, DM54LS161AW,  
DM54LS163AJ, DM54LS163AW, DM74LS161AM,  
DM74LS161AN, DM74LS163AM or DM74LS163AN  
See NS Package Number E20A, J16A,  
M16A, N16E or W16A  
TL/F/6397–1  
C
1995 National Semiconductor Corporation  
TL/F/6397  
RRD-B30M105/Printed in U. S. A.  

与DM54LS163AE相关器件

型号 品牌 获取价格 描述 数据表
DM54LS163AE/883 NSC

获取价格

IC,COUNTER,UP,4-BIT BINARY,LS-TTL,DIP,16PIN,CERAMIC
DM54LS163AJ NSC

获取价格

Synchronous 4-Bit Binary Counters
DM54LS163AJ/883 ROCHESTER

获取价格

LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16, CERAMIC, DIP-16
DM54LS163AJ/883B NSC

获取价格

IC,COUNTER,UP,4-BIT BINARY,LS-TTL,DIP,16PIN,CERAMIC
DM54LS163AJ/883C NSC

获取价格

IC,COUNTER,UP,4-BIT BINARY,LS-TTL,DIP,16PIN,CERAMIC
DM54LS163AM NSC

获取价格

Synchronous 4-Bit Binary Counters
DM54LS163AN NSC

获取价格

Synchronous 4-Bit Binary Counters
DM54LS163AW NSC

获取价格

Synchronous 4-Bit Binary Counters
DM54LS163AW/883 ROCHESTER

获取价格

LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP16, W16A
DM54LS163AW/883B NSC

获取价格

IC,COUNTER,UP,4-BIT BINARY,LS-TTL,FP,16PIN,CERAMIC