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DM5490J PDF预览

DM5490J

更新时间: 2024-11-24 22:54:35
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器触发器逻辑集成电路
页数 文件大小 规格书
10页 136K
描述
Decade and Binary Counters

DM5490J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:CERAMIC, DIP-14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.62
Is Samacsys:N其他特性:DIVIDE BY 2 AND DIVIDE BY 5 FUNCTIONS
计数方向:UP系列:TTL/H/L
JESD-30 代码:R-GDIP-T14JESD-609代码:e0
长度:19.43 mm负载/预设输入:YES
逻辑集成电路类型:DECADE COUNTER最大频率@ Nom-Sup:16000000 Hz
最大I(ol):0.016 A工作模式:ASYNCHRONOUS
位数:3功能数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):42 mA认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Counters
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:7.62 mm最小 fmax:32 MHz
Base Number Matches:1

DM5490J 数据手册

 浏览型号DM5490J的Datasheet PDF文件第2页浏览型号DM5490J的Datasheet PDF文件第3页浏览型号DM5490J的Datasheet PDF文件第4页浏览型号DM5490J的Datasheet PDF文件第5页浏览型号DM5490J的Datasheet PDF文件第6页浏览型号DM5490J的Datasheet PDF文件第7页 
July 1992  
DM5490/DM7490A, DM7493A  
Decade and Binary Counters  
General Description  
Each of these monolithic counters contains four master-  
slave flip-flops and additional gating to provide a divide-by-  
two counter and a three-stage binary counter for which the  
count cycle length is divide-by-five for the 90A and divide-  
by-eight for the 93A.  
described in the appropriate truth table. A symmetrical di-  
vide-by-ten count can be obtained from the 90A counters by  
connecting the Q output to the A input and applying the  
D
input count to the B input which gives a divide-by-ten square  
wave at output Q .  
A
All of these counters have a gated zero reset and the 90A  
also has gated set-to-nine inputs for use in BCD nine’s com-  
plement applications.  
Features  
Y
Typical power dissipation  
145 mW  
130 mW  
Ð 90A  
Ð 93A  
To use their maximum count length (decade or four-bit bina-  
ry), the B input is connected to the Q output. The input  
A
count pulses are applied to input A and the outputs are as  
Y
Count frequency 42 MHz  
Connection Diagrams  
Dual-In-Line Package  
TL/F/6533–1  
Order Number DM5490J, DM5490W or DM7490AN  
See NS Package Number J14A, N14A or W14B  
Dual-In-Line Package  
TL/F/6533–2  
Order Number DM7493AN  
See NS Package Number N14A  
C
1995 National Semiconductor Corporation  
TL/F/6533  
RRD-B30M105/Printed in U. S. A.  

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