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DM5442A

更新时间: 2024-10-26 23:47:19
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6页 121K
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DM5442A 数据手册

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June 1989  
5442A/DM5442A/DM7442A  
BCD to Decimal Decoders  
General Description  
Features  
Y
Diode clamped inputs  
These BCD-to-decimal decoders consist of eight inverters  
and ten, four-input NAND gates. The inverters are connect-  
ed in pairs to make BCD input data available for decoding  
by the NAND gates. Full decoding of input logic ensures  
that all outputs remain off for all invalid (1015) input condi-  
tions.  
Y
Also for application as 4-line-to-16-line decoders; 3-line-  
to-8-line decoders  
Y
Y
Y
Y
All outputs are high for invalid input conditions  
Typical power dissipation 140 mW  
Typical propagation delay 17 ns  
Alternate Military/Aerospace device (5442A) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6516–1  
Order Number 5442ADMQB, 5442AFMQB, DM5442AJ, DM5442AW or DM7442AN  
See NS Package Number J16A, N16E or W16A  
Function Table  
BCD Input  
Decimal Output  
No.  
D
C
B
A
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
L
L
L
L
L
L
L
L
L
H
L
L
H
H
L
L
H
L
H
L
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
5
6
7
8
9
L
L
L
H
H
H
H
H
L
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
L
L
L
H
H
I
H
H
H
H
H
H
L
L
H
H
H
H
H
H
L
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
N
V
A
L
I
H
D
e
e
H
L
High Level  
Low Level  
C
1995 National Semiconductor Corporation  
TL/F/6516  
RRD-B30M105/Printed in U. S. A.  

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