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DEI1160A-SMS

更新时间： 2024-01-08 02:39:02
品牌 Logo 应用领域
DEIAZ 输入元件光电二极管接口集成电路
页数 文件大小 规格书
13页 570K
描述
PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC

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DEI1160A-SMS 技术参数

是否Rohs认证： 不符合生命周期：Active
包装说明：ESOIC-16Reach Compliance Code：unknown
风险等级：5.73其他特性：IT ALSO OPERATE WITH 5 VOLT NOMINAL
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：R-PDSO-G16
长度：9.9 mm功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
座面最大高度：1.75 mm最大供电电压：3.4 V
最小供电电压：3.2 V标称供电电压：3.3 V
电源电压1-Nom：15 V表面贴装：YES
温度等级：MILITARY端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.91 mm
Base Number Matches：1

DEI1160A-SMS 数据手册

 浏览型号DEI1160A-SMS的Datasheet PDF文件第1页浏览型号DEI1160A-SMS的Datasheet PDF文件第2页浏览型号DEI1160A-SMS的Datasheet PDF文件第3页浏览型号DEI1160A-SMS的Datasheet PDF文件第5页浏览型号DEI1160A-SMS的Datasheet PDF文件第6页浏览型号DEI1160A-SMS的Datasheet PDF文件第7页 
Table 2 Truth Table  
SEL  
X
H
/CS  
H
Ļ
SCLK  
SDI  
X
X
DIN[1:8]  
SDO  
HI Z  
DIN[8]  
DR[8]  
DESCRIPTION  
Not Selected  
DR[1:8]ĸ DIN[1:8]  
X
L
Ĺ
X
Valid  
X
H
L
DR[1]  
DR[n+1] ĸ DR[n], DR[1] ĸ SDI  
L
L
L
Ĺ
Ĺ
L
CR[1]  
X
X
X
CR[8]  
HI Z  
CR[n+1] ĸ CR[n], CR[1] ĸ SDI  
CL[1:8]ĸ CR[1:8]  
Legend:  
DR = Data Register  
CR = Configuration Register  
CL = Configuration Latch  
DIN[1:8] Discrete AFE  
The Discrete Input Analog Front End circuit function is represented in Figure 3. Each DINn signal is conditioned by the  
resistor / diode network and presented to an amplifier followed by a comparator with hysteresis. When the input is configured  
for GND/OPEN operation, the pull-up resistor & diode is enabled and the appropriate amplifier offset voltage and comparator  
threshold voltage are selected. When configured for 28V/OPEN, the pull-down resistor is enabled and the amp/comparator is  
appropriately configured.  
Some notable features are:  
x
x
The input current is ~1mA. This current will prevent a “dry” relay contact.  
The input threshold voltage and hysteresis:  
o
o
o
The falling Vth > 3.5V.  
The rising Vth < 14V.  
Hysteresis is maximum practical to meet the threshold requirements.  
x
x
Input noise immunity is maximized with a combination of voltage hysteresis and use of a slow input voltage  
comparator  
The inputs can withstand continuous input voltages of 40V minimum. The isolation diode breakdown voltage is  
greater than 45V. The 10K Ohm input resistor is designed to limit diode breakdown current to safe levels during  
transient events.  
Data Register  
The 8-bit Data Register is a “parallel-input, serial-output” register that samples the input channels and reads-out the data to the  
Serial Data Output. The register is read via the SDO output as described in Figure 4 and Figure 5. A low input level results in  
a Logic 0, and a high input level results in a Logic 1.  
Configuration Register  
The 8-bit Configuration Register is a “serial-input, parallel-output with data latch” register that individually configures each  
AFE input as either GND/OPEN or 28V/OPEN format. The register is programmed via the serial data input as described in  
Figure 6 and Figure 7. Logic 0 sets the respective input to 28V/OPEN mode (pull-down); Logic 1 sets the respective input to  
GND/OPEN mode (pull-up).  
The register is Reset to 0’s when the Vcc Logic Supply voltage transitions from low to hi, thus initializing the AFE inputs to a  
pull-down state.  
©2014 Device Engineering Inc.  
4 of 13  
DS-MW-01160-02 Rev A  
03/21/2014  
1234567...13

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