Datasheet > DEI1160

DEI1160

更新时间： 2024-01-22 11:28:04

品牌	Logo	应用领域
DEIAZ		输入元件
页数	文件大小	规格书
13页	517K
描述
PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC

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技术参数
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DEI1160 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	HSOP,	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	8.31
其他特性：	IT ALSO OPERATES AT 5V AND 15V	接口集成电路类型：	INTERFACE CIRCUIT
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e0
长度：	9.9 mm	功能数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG	认证状态：	Not Qualified
座面最大高度：	1.75 mm	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	3.91 mm	Base Number Matches：	1

DEI1160 数据手册

FUNCTIONAL DESCRIPTION

The DEI1160 is an eight-channel discrete-to-digital interface IC implemented in an HV DMOS technology. It senses eight

discrete signals of the type commonly found in avionic systems and converts them to serial logic data. Each input can be

individually configured as either GND/OPEN or 28V/OPEN format input via a serial data input command. The discrete data

is read from the device via an eight-bit serial shift register with 3-state output. This serial interface is compatible with the

industry standard Serial Peripheral Interface (SPI) bus.

Table 1 Pin Descriptions

PINS

NAME

DESCRIPTION

1-8

DIN[1:8]

Discrete Inputs. Eight discrete signals which can be individually

configured as either GND/OPEN or 28V/OPEN format inputs.

Logic Output. Serial Data Output. This pin is the output from MSB (Bit

8) of the selected shift register (Data/Configuration). It is clocked by the

rising edge of SCLK. This is a 3-state output enabled by /CS.

Logic Input. Serial Shift Clock. A low-to-high transition on this input

shifts data on the serial data input into Bit 0 of the selected shift register.

The selected shift register is shifted from Bit 0 to Bit 7. Bit 7 of the

selected shift register is driven on DOUT.

SDO

SCLK

/CS

Logic Input. Chip Select. A low level on this input enables the SDO 3-

state output and the selected shift register. A high level on this input

forces DOUT to the high impedance state and disables the shift registers

so SCLK transitions have no effect. When the Data register is selected, a

high-to-low transition causes the Discrete Input data to be loaded into the

Data register. When the Configuration Register is selected, a low-to-high

transition causes the Serial Configuration register data to be loaded into

the parallel configuration outputs.

SDI

Logic Input. Serial Data Input. Data on this input is shifted into the LSB

(Bit 1) of the selected shift register on the rising edge of the SCLK when

/CS input is low.

Logic Input. Selects between the Serial DATA and CONFIGURATION

registers. H = DATA, L = CONF.

SEL

VCC

GND

VDD

Logic Supply Voltage. 3.3V or 5V

Logic/Signal Ground

Analog Supply Voltage. +15V+/-10%

2 of 13

DS-MW-01160-01 Rev D

03/17/2014

123 4 5 6 7...13

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与DEI1160相关器件

型号	品牌	描述	获取价格	数据表
DEI1160A	DEIAZ	PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC	获取价格
DEI1160A-SES	DEIAZ	PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC	获取价格
DEI1160A-SMS	DEIAZ	PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC	获取价格
DEI1160-SES	DEIAZ	PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC	获取价格
DEI1160-SMS	DEIAZ	PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC	获取价格
DEI1166	DEIAZ	OCTAL GND/OPEN INPUT PARALLEL OUTPUT INTERFACE IC	获取价格

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