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DAC8420EP PDF预览

DAC8420EP

更新时间: 2024-10-30 22:50:43
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 590K
描述
Quad 12-Bit Serial Voltage Output DAC

DAC8420EP 数据手册

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Quad 12-Bit Serial  
Voltage Output DAC  
a
DAC8420  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Guaranteed Monotonic Over Temperature  
Excellent Matching Between DACs  
Unipolar or Bipolar Operation  
VDD  
1
VREFHI  
5
SDI 10  
CS 12  
Buffered Voltage Outputs  
REG  
DAC A  
DAC B  
DAC C  
DAC D  
7
6
VOUTA  
VOUTB  
VOUTC  
VOUTD  
A  
High Speed Serial Digital Interface  
Reset to Zero- or Center-Scale  
Wide Supply Range, +5 V-Only to ؎15 V  
Low Power Consumption (35 mW max)  
Available in 16-Pin DIP and SOL Packages  
12  
CLK  
11  
REG  
B
SHIFT  
REGISTER  
APPLICATIONS  
Software Controlled Calibration  
Servo Controls  
Process Control and Automation  
ATE  
NC  
13  
REG  
C
3
4
DECODE  
14  
LD  
REG  
D
2
2
9
16  
15  
4
8
VREFLO  
VSS  
GND  
CLSEL CLR  
GENERAL DESCRIPTION  
The DAC8420 is available in 16-pin epoxy DIP, cerdip, and  
wide-body SOL (small-outline surface mount) packages. Opera-  
tion is specified with supplies ranging from +5 V-only to ±15 V,  
with references of +2.5 V to ±10 V respectively. Power dissipa-  
tion when operating from ±15 V supplies is less than 255 mW  
(max), and only 35 mW (max) with a +5 V supply.  
The DAC8420 is a quad, 12-bit voltage-output DAC with serial  
digital interface, in a 16-pin package. Utilizing BiCMOS tech-  
nology, this monolithic device features unusually high circuit  
density and low power consumption. The simple, easy-to-use  
serial digital input and fully buffered analog voltage outputs  
require no external components to achieve specified performance.  
For applications requiring product meeting MIL-STD-883,  
contact your local sales office for the DAC8420/883 data sheet,  
which specifies operation over the –55°C to +125°C tempera-  
ture range.  
The three-wire serial digital input is easily interfaced to micro-  
processors running at 10 MHz rates, with minimal additional  
circuitry. Each DAC is addressed individually by a 16-bit serial  
word consisting of a 12-bit data word and an address header.  
The user-programmable reset control CLR forces all four DAC  
outputs to either zero or midscale, asynchronously overriding  
the current DAC register values. The output voltage range, de-  
termined by the inputs VREFHI and VREFLO, is set by the  
user for positive or negative unipolar or bipolar signal swings  
within the supplies allowing considerable design flexibility.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  

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