Actual Size
3 mm x 3 mm
DAC7552
www.ti.com
SLAS442B–JANUARY 2005–REVISED JUNE 2005
12-BIT, DUAL, ULTRALOW GLITCH, VOLTAGE OUTPUT
DIGITAL-TO-ANALOG CONVERTER
FEATURES
DESCRIPTION
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2.7-V to 5.5-V Single Supply
The DAC7552 is
a 12-bit, dual-channel, volt-
age-output DAC with exceptional linearity and
monotonicity. Its proprietary architecture minimizes
undesired transients such as code-to-code glitch and
12-Bit Linearity and Monotonicity
Rail-to-Rail Voltage Output
Settling Time: 5 µs (Max)
channel-to-channel
crosstalk.
The
low-power
Ultralow Glitch Energy: 0.1 nVs
Ultralow Crosstalk: –100 dB
DAC7552 operates from a single 2.7-V to 5.5-V
supply. The DAC7552 output amplifiers can drive a
2-kΩ, 200-pF load rail-to-rail with 5-µs settling time;
the output range is set using an external voltage
reference.
Low Power: 440 µA (Max)
Per-Channel Power Down: 2 µA (Max)
Power-On Reset to Zero Scale
SPI-Compatible Serial Interface: Up to 50 MHz
Daisy-Chain Capability
The 3-wire serial interface operates at clock rates up
to 50 MHz and is compatible with SPI, QSPI,
Microwire™, and DSP interface standards. The out-
puts of all DACs may be updated simultaneously or
sequentially. The parts incorporate a power-on-reset
circuit to ensure that the DAC outputs power up to
zero volts and remain there until a valid write cycle to
the device takes place. The parts contain
power-down feature that reduces the current con-
sumption of the device to under 2 µA.
Asynchronous Hardware Clear
Simultaneous or Sequential Update
Specified Temperature Range: –40°C to 105°C
Small 3-mm × 3-mm, 16-Lead QFN Package
a
APPLICATIONS
The small size and low-power operation makes the
DAC7552 ideally suited for battery-operated portable
applications. The power consumption is typically
1.5 mW at 5 V, 0.75 mW at 3 V, and reduces to 1 µW
in power-down mode.
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Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Control
The DAC7552 is available in a 16-lead QFN package
and is specified over –40°C to 105°C.
FUNCTIONAL BLOCK DIAGRAM
V
DD
IOV
V
REFA
DD
V
FBA
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V
OUT
A
B
Input
Register
DAC
Register
String
DAC A
SCLK
SYNC
SDIN
Interface
Logic
V
FBB
_
+
V
String
DAC B
OUT
Input
Register
DAC
Register
Power-On
Reset
Power-Down
Logic
DAC7552
SDO
GND
V
REFB
PD
CLR
DCEN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Microwire is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated