5x7mm Surface Mount
High Precision
TCXO
In Stock at Digi-Key
Description
Features
The Connor-Winfield’s D75A -
Series are 5x7mm Surface
Mount Temperature
Model D75A
TCXO
3.3V Operation
LVCMOS Output Logic
Frequency Stability: 0.28ppm
Temperature Range: 0 to 70°C
Low Jitter <1pS RMS
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630-851-5040
Compensated Crystal
Controlled Oscillators (TCXO)
with a Tri-State LVCMOS output.
Through the use of Analog
Temperature Compensation, the
D75A - Series are capable of holding
sub 1-ppm stabilities over the 0 to
70°C temperature range.
www.conwin.com
Tri-State Enable/Disable Function
5x7mm Surface Mount Package
Tape and Reel Packaging
RoHS Compliant / Lead Free
US Headquarters
630-851-4722:
European Headquarters:
+353-61-472221
Absolute Maximum Ratings
Parameter
Minimum
-55
Nominal
Maximum
85
Units
°C
Note
Storage Temperature
-
-
-
Supply Voltage
Input Voltage
(Vcc)
(Fo)
-0.5
6.0
Vdc
Vdc
-0.5
Vcc+0.5
Operating Specifications
Parameter
Minimum
Nominal
Maximum
Units
MHz
Note
Frequencies Available
10.0, 12.8, 19.2, 20.0
Frequency Calibration @ 25 C
Frequency Stability [ (Fmax – Fmin)/2.Fo]
Holdover Stability (Over 24 Hours )
Supply Voltage Variation (Vcc 5%)
Load Coefficient ( 5%)
-1.00
-
-
-
-
-
-
-
-
1.00
0.28
0.32
0.20
0.20
0.40
4.60
70
ppm
1
2
3
-0.28
ppm
-0.32
ppm
-0.20
ppm
-0.20
ppm
Static Temperature Hysteresis
Total Frequency Tolerance
Temperature Range
-
ppm
Absolute, 4
5
-4.60
ppm
0
C
Supply Voltage
(Vcc)
(Icc)
3.135
3.3
-
3.465
Vdc
Supply Current
-
-
-
-
-
-
-
-
6
5
1
mA
Period Jitter
3
ps rms
ps rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Phase Jitter (BW=12kHz to 20MHz)
SSB Phase Noise at 10Hz offset
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at >100KHz offset
0.5
-80
-110
-135
-150
-150
Input Characteristics For Enable / Disable Function (Pin 8)
Parameter
Minimum
70%Vcc
-
Nominal
Maximum
-
Units
Vdc
Note
Enable Voltage (High) or open circuit
Disable Voltage (Low) Output Tri-stated
(Vih)
(Vil)
-
-
6
30%Vcc
Vdc
LVCMOS Output Characteristics
Parameter
Minimum
Nominal
Maximum
Units
pF
Note
LOAD
-
15
-
-
7
Voltage
(High)
(Low)
(High)
(Low)
(Voh)
(Vol)
(Ioh)
(Iol)
90%Vcc
-
Vdc
Vdc
mA
mA
%
-
-4
-
-
10%Vcc
Current
-
-
4
-
Duty Cycle at 50% of Vcc
45
-
50
-
55
8
Rise / Fall Time 10% to 90%
ns
Note:
1)
2)
3)
4)
5)
Initial calibration @ 25 C. Specifications at time of shipment after 48 hours of operation
Frequency stability vs. change in temperature.
Inclusive of frequency stability, supply voltage change ( 1%), load change, aging, for 24 hours
Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C.
Inclusive of calibration @ 25 C, frequency vs. change in temperature, change in supply voltage ( 5%), load change ( 5%), reflow soldering process
and 20 years aging, referenced to Fo.
Leave Pad 8 unconnected if enable / disable function is not required. When tri-stated, the output stage is disabled but the oscillator and
compensation circuit are still active (current consumption < 1 mA).
For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF.
Bulletin
Page
Tx236
1 of 2
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Revision
Date
6)
7)
01 Oct 2008
Specifications subject to change without notice. All dimensions in inches. © Copyright 2008 The Connor-Winfield Corporation